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Dieudonne Manzi

dblp:163/3578 · also Dieudonne Manzi Mugisha · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 2016
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Energy-efficient computing · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Energy-efficient computing › low-power design
low-power processor design
0.212015
Opportunistic turbo execution in NTC: exploiting the paradigm shift in performance bottlenecks · DAC 2015
Energy-efficient computing › voltage scaling
near-threshold computing
0.212015
Opportunistic turbo execution in NTC: exploiting the paradigm shift in performance bottlenecks · DAC 2015

Methods — techniques the papers use, named apart from their topics

circuit-architectural analysis · 0.2
YearPublicationVenuePosition
2016 Exploring GPU Acceleration of Apache Spark
abstract
Apache Spark is one of the most active open-source cluster computing frameworks. However, there has been very limited research on improving Spark performance using GPUs. This paper explores the feasibility and benefits of off loading Spark core operations to GPUs. Experimental results from popular Spark applications show a performance improvement of up to 17X for a K-Means Clustering application. The results are used to suggest the type of applications that will benefit the most from off loading Spark workloads to GPUs.
Dieudonne Manzi, David Tompkins
IC2E1
2015 Opportunistic turbo execution in NTC: exploiting the paradigm shift in performance bottlenecks
abstract
In this paper, we investigate an intriguing shifting trend in performance bottlenecks for Near-Threshold Computing (NTC) processors. Our study demonstrates that the traditional memory latency bottleneck is largely superseded by the bottlenecks of Long Latency Datapaths (LLDs) within a processor core. To exploit this paradigm shift, we propose Opportunistic Turbo Execution (OTE). OTE dynamically boosts the performance of LLDs, by several factors, improving both performance and energy efficiency in an NTC core. Using a comprehensive circuit-architectural analysis, we demonstrate a 42.2% improvement in energy efficiency over a recently proposed technique, across a range of benchmarks.
Dieudonne Manzi, Sanghamitra Roy, Koushik Chakraborty
DAC2