Honghao Zheng

dblp:164/4589 · DBLP profile ↗
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5ranked-venue papers
4as first author
5since 2021 · last 2025
—ORCID · conflict

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Systems, architecture and hardware · 5 · 4 first-author · 5 since 2021Artificial intelligence and machine learning · 2 · 1 first-author · 2 since 2021
YearPublicationVenuePosition
2025 A Rehabilitation Robot System to Enhance Proprioception with Physical and Virtual Simulation of Multi-terrain Scenarios
abstract
Increasing evidence highlights the role of proprio-ceptive deficits in falls, emphasizing the need for targeted rehabilitation in populations with functional movement disorders. Despite advances in rehabilitation robots, movement constraints still hinder active engagement of the lower limb muscles, thereby limiting the effectiveness of proprioceptive training. In this work, We developed a neuro-rehabilitation robotic platform to address this need by physically and virtually simulating multi-terrain scenarios. The robot introduces common perturbations, such as uneven mountain trails, sandy beaches, and bumpy bus rides, to assess user stability and recovery, thereby assisting in the design of individualized training programs. The platform enhances neuromuscular responses across multiple directions and facilitates targeted muscle contraction through motor tasks that combine proprioceptive and visual feedback. Preliminary studies demonstrated that the robot successfully facilitated a complete range of ankle rotational movements. Electromyographic analysis revealed increased activation of specific muscle groups, changes in muscle loading and contraction patterns, suggesting that the system recruits multiple muscle groups while enhancing proprioceptive input to periarticular soft tissues. The proposed robot and control strategies established a feasible solution to enhance proprioception rehabilitation.
Liziyi Hao, Zhaocheng Zhou, Honghao Zheng, Jianda Han, Ningbo Yu
IROS3
2025 An Improved Flexible Hand Exoskeleton with SEA for Finger Strength Estimation and Progressive Resistance Exercise
abstract
Hand exoskeletons can recognize user’s intent and provide active resistance training to enhance finger strength in stroke patients. However, achieving fine human-robot interaction (HRI) while maintaining system simplicity for lightweight design remains a key challenge. In this work, we present an improved flexible hand exoskeleton with series elastic actuator (SEA) for hand strength estimation and progressive resistance exercise. The SEA design allows the hand exoskeleton to have backdrivability to improve HRI performance. By combining the flexible linkage with the flex sensor, we propose a novel user interface that is able to sensitively acquire hand motion intent. An Extended Kalman Filter (EKF) based tracking errors estimation is designed to evaluate the finger strength. The results of the finger strength estimation are used to adjust the parameters of the admittance model to provide small or large damping when the user’s finger strength is low or high, achieving active admittance control based progressive resistance exercise. The feasibility has been demonstrated by two sets of experiments, and this work has established a hand exoskeleton solution for finger strength estimation and fine human-robot interaction.
Honghao Zheng, Zhaocheng Zhou, Liziyi Hao, Jianda Han, Ningbo Yu
IROS1
2023 Spiking Neural Encoding Schemes and STDP Training Algorithms for Edge Computing
abstract
To enhance real-time data processing, edge computing is utilized in a wider and wider range of applications. For the areas that require large bandwidth and low latency, edge computing even becomes a must. For instance, in the communication area, spectrum sharing within multiple users requires high accuracy of spectrum using prediction as well as low latency. For such tasks, neuromorphic computing, especially spiking neural networks (SNNs), can be a potential method because of its power and silicon area efficiency. In this paper, we have discussed various kinds of spiking neural encoding schemes and their integrated circuit (IC) implementations. We have also summarized the pair-based STDP and the triplet-based STDP learning rule, their mathematical models, and the triplet-based reconfigurable circuit implementation. The Pytorch simulation of different encoding schemes working with two STDP rules for the MNIST and a dynamic spectrum sensing dataset is also presented. It shows that multiplexing ISI-phase encoder can achieve at most 8.9% higher accuracy than other encoders, and TSTDP provides 2.7% higher accuracy than PSTDP for the MNIST dataset. What's more, for the task of spectrum sensing for edge computing, the multiplexing encoding is also 4.3% more accurate, and TSTDP is 0.3% more accurate for the spectrum utilization prediction.
Honghao Zheng, Yang Yi 0002
SEC1
2023 Enhancing SNN Training Performance: A Mixed-Signal Triplet Reconfigurable STDP Circuit with Multiplexing Encoding
abstract
In spike-timing-dependent plasticity (STDP), synap-tic weights are modified according to the relative time difference between pre and post-synaptic spikes of spiking neural network (SNN). A triplet STDP model was proposed since this model can better take account of a series of spikes and thus more closely mimic the activity in biological neural systems. Circuit that can switch between different STDP rules was also introduced to improve the range of STDP applications. To apply the advantages of triplet STDP to various tasks, a mixed-signal triplet reconfigurable STDP circuit and its hardware prototype are proposed in this paper. The performance analysis of the STDP training algorithm is carried out with a hardware testbench as well as Pytorch-based SNN. This triplet STDP design achieves 3.28% and 3.63% higher accuracy than the pair STDP learning rule through datasets such as MNIST and CIFAR-10. Our design shows one of the best reconfigurability while keeping a relatively low energy per spike operation (SOP) through the performance comparison with the state of the arts.
Honghao Zheng
ISCAS1
2023 Enabling a New Methodology of Neural Coding: Multiplexing Temporal Encoding in Neuromorphic Computing
abstract
From rate to temporal encoding, spiking information processing has demonstrated advantages across diverse neuromorphic applications. In the aspects of data capacity and robustness, multiplexing encoding outperforms alternative encoding schemes. In this work, we aim to implement a new class of multiplexing temporal encoders, patterning stimuli in multiple timescales to improve the information processing capability, and robustness of systems deployed in noisy environments. Benefitted by the internal reference frame using subthreshold membrane oscillation (SMO), the encoded spike patterns are less sensitive to the input noise, increasing the encoder’s robustness. Our design results in a tremendous saving on power consumption and silicon area compared with the power-hungry analog-to-digital converters. Furthermore, a working prototype of the multiplexing temporal encoder built based on an interspike interval (ISI) encoding scheme is implemented on a silicon chip using the standard 180-nm CMOS process. To the best of our knowledge, our introduced encoder demonstrates the first integrated circuit (IC) implementation of neural encoding with multiplexing topology. Finally, the accuracy and efficiency of our design are evaluated through standard machine learning benchmarks, including Modified National Institute of Standards and Technology (MNIST), Canadian Institute For Advanced Research (CIFAR)-10, Street View House Number (SVHN), and spectrum sensing in high-speed communication networks. While our multiplexing temporal encoder demonstrates a higher classification accuracy across all the benchmarks, the power consumption and dissipated energy per spike reach merely$2.6~\mu \text {W}$and 95 fJ/spike, respectively, with an effective frame rate of 300 MHz. Compared with alternative encoding schemes, our multiplexing temporal encoder achieves at most 100% higher data capacity, 11.4% more accurate in classification, and 25% more robust against noise. Compared with the state-of-the-art designs, our work achieves up to$105 \times $power efficiency without significantly increasing the silicon area.
Honghao Zheng, Kangjun Bai, Yang Yi 0002
IEEE Trans. Very Large Scale Integr. Syst.1