In this paper a Compatible Selective Harmonic Elimination (CSHE)-PWM is designed for three-leg four-wire (3L/4W) Neutral Point Clamped (NPC) inverter. The proposed CSHE-PWM is capable of eliminating both triplen and non-triplen harmonics from phase voltages and empowers 3L/4W NPC to handle both single/three-phase and linear/nonlinear loads. It has been mathematically proved that DC capacitors self-voltage balancing is achieved thanks to direct control of phase voltage waveform symmetry. Moreover, the cancellation of specified triplen and non-triplen orders has the advantage of having low capacitors voltage ripple. Therefore, the applied technique not only helps removing one leg of the inverter that reduces associate complex calculations and switching losses, but also directly controls phase voltage harmonic profile compared to SHE-PWM for four-leg four-wire (4L/4W) NPC. CSHE-PWM is practically tested on a NPC inverter prototype to validate the efficient harmonic elimination from the phase voltage waveforms along with capacitors voltages balancing under symmetrical/asymmetrical loads.

This paper presents a simple yet robust dq-frame current control strategy for a single-phase 5-level Packed U-Cell (PUC5) inverter, targeting efficient and reliable integration of renewable energy (RE) sources into the grid. The proposed approach exploits the inherent self-balancing characteristics of the PUC5 topology, thereby eliminating the need for capacitor voltage sensors or active balancing circuits. This leads to a simplified hardware structure and reduced overall system complexity and cost. A conventional PI-based dq controller is employed to regulate the injected grid current, ensuring decoupled control of active and reactive powers. Extensive simulations in MATLAB/Simulink demonstrate that the system maintains a unity power factor and achieves low total harmonic distortion (THD) using a basic L-type filter. Moreover, one of the key outcomes is the natural and stable self-balancing of the flying capacitor voltage, which consistently maintains its voltage around half the DC link voltage with low ripples, even under dynamic changes in current reference and DC input voltage. These results confirm the PUC5-controller solution’s reliability and suitability (compelling alternative to more complex multilevel converter architectures) for grid-connected applications.

This study proposes a model predictive control (MPC) strategy integrated with closed-loop space vector modulation (CL-SVM) for a three-phase, three-level neutral point clamped (3L-NPC) rectifier supplying two alkaline electrolyzers connected in series. Electrolyzers present a nonlinear and dynamically varying load due to their dependence on temperature, pressure, and electrochemical reaction rates, imposing strict requirements on the stability and responsiveness of the power supply. Among, multi-level converter topologies, the 3L-NPC rectifier is a promising candidate for low to medium-voltage, high power applications due to its reduced harmonic distortion, improved high power handling, and balanced trade-off between complexity and performance. However, maintaining DC-link capacitor voltage balance under dynamic loads remains challenging, risking power quality and system reliability. The proposed approach optimizes voltage vector selection to regulate DC output and minimize neutral-point voltage deviation. Simulation results in MATLAB/Simulink confirm the effectiveness of the designed controller in achieving stable DC voltage and a balanced neutral-point voltage, thereby enhancing the overall performance of the power-electronics interface in electrolyzer applications.

This paper proposes a simplified parallel differential power processing (PDPP) architecture for photovoltaic (PV) systems that reduces hardware complexity by eliminating one dual active bridge (DAB) converter and one intermediate bus capacitor from the previously introduced PV2VB PDPP two-string architecture. In the reference PV2VB PDPP architecture, each PV string is interfaced with its own string-level converter (SLC), comprising a DAB and a bridgeless (BL) converter, for maximum power point tracking (MPPT) and differential power exchange via a shared virtual bus. The proposed topology maintains the use of bridgeless converters for each PV string but replaces the two DAB stages with a single dual-bridge DAB converter, which connects one intermediate bus on one side and the virtual bus on the other. This approach maintains isolation and bidirectional power flow, while significantly reducing the number of magnetic components, switches, and control loops. Simulation results demonstrate that the system can reach and sustain steady-state operation of the virtual bus under various mismatch conditions, validating the effectiveness of the proposed architecture in ensuring power balance and enabling string-level MPPT. The results suggest that the proposed scheme preserves the key benefits of the PV2VB PDPP framework, while simultaneously reducing overall system cost.

This research presents a neural-adaptive control technique for DC microgrids in renewable hydrogen production systems. The proposed approach tackles voltage stability issues arising from variable solar production and fluctuating electrolyzer loads with an adaptive neural network-based proportional-integral (ANN-PI) controller with online system identification. The control architecture utilizes two concurrent multilayer perceptron (MLP) networks: one for real-time system identification to estimate the Jacobian matrix, and another for adaptive proportional-integral (PI) parameter adjustment. The decentralized architecture removes communication dependencies among converters, hence improving reliability and scalability. Simulation results indicate a better dynamic response with a 50% decrease in settling time, increased voltage stability retaining the DC bus voltage within ±2% of the nominal 400 V, and resilient performance under diverse situations, including load transitions and changes in solar irradiation. The neural-adaptive method effectively facilitates intelligent, model-free regulation for electric-hydrogen DC microgrids.

This paper presents a simulation-based case study of a hybrid energy hub located at The Green Village (TGV), a living lab for sustainable innovations in Delft, The Netherlands. The energy hub integrates photovoltaic (PV) generation, battery storage, hydrogen production, seasonal storage, and usage to provide a fully electrified one-person residence, serving as a realistic testbed for the integration of renewable energy. A model of the hub is developed in Simulink/Matlab using historical operational data to simulate system behaviour under various edge case scenarios and system configurations. The model enables the evaluation of system-level interactions, operational strategies, and the impact of design choices on energy efficiency, self-sufficiency, and hydrogen integration. The simulation results show the sensitivity of the system performance to component sizing and EMS settings. This study provides valuable insights into the control and optimisation of The Green Village’s energy hub and its integrated energy systems, contributing to the practical deployment of resilient and sustainable energy hubs in the built environment.

This paper presents an innovative control strategy to enhance the stability of interconnected Microgrids (MGs) with low inertia and high penetration levels of Renewable Energies (REs). The proposed control strategy encompasses a new virtual droop control mechanism that emulates the primary control of synchronous generators for enhanced system stability. Additionally, a weighted Proportional-Integral (PI) controller is used to mitigate the adverse effects of measurement delays caused by Phase-Locked Loop (PLL) dynamics. Furthermore, a feedback integral loop is introduced to improve the efficiency and lifespan of Vanadium Redox Flow Batteries (VRFBs) enabling swift and precise power delivery while reducing steadystate errors. Finally, a new fractional-order virtual inertia control (VIC) is introduced to leverage the fractional derivatives and enhance the system’s frequency response. The presented simulation results demonstrate the effectiveness of the proposed control approach in improving the frequency response and power exchange dynamics across interconnected MGs under various operating scenarios.

This paper presents a comprehensive review of recent advancements in FPGA-based power electronics converters. The increasing demand for high-efficiency, high-power density converters has led to the exploration of novel strategies and their implementation on FPGA platforms. The paper discusses the advantages and limitations of techniques where FPGA played as the control platform in design implementations, highlighting their suitability for specific applications. Additionally, it explores the use of advanced FPGA features, such as digital clock managers (DCMs), delay-locked loops (DLLs), and phase-locked loops (PLLs), to achieve high-resolution and high-frequency PWM generation. The paper also delves into the application of artificial intelligence, particularly neural networks, to optimize and enhance the performance of FPGA-based controllers. The current challenges and future research directions in this rapidly evolving field will also be presented.

In this paper, a Reinforcement Learning controller (RLC) is designed and implemented on a 5-level Packed U-Cell (PUC5) grid-connected inverter to control the injected current flowing into the electric network. The RL agent is trained using a Proportional-Integral (PI) reward function to optimize its control strategy. Moreover, the voltage balancing of the auxiliary capacitor in PUC5 is separated from the RL controller and integrated into the switching algorithm to reduce the training burden. This modification reduces the observation inputs required for RL training, significantly shorten the training time. Simulation studies conducted in Matlab/Simulink evaluate the performance of the proposed RL controller, demonstrating robust dynamic response and accurate tracking of reference signals across different operational conditions.

This paper proposes a novel sensorless phase-shift modulation-based voltage balancing technique for a 5-level Packed U-Cell (PUC5) inverter. Two phase-shifted triangular carriers are used to modulate the reference signal and generate the appropriate gate pulses. The switching pulse generation is specifically designed to charge and discharge the capacitor at the speed of switching frequency, resulting in a fast voltage balancing of the auxiliary capacitor. Compared with the reported level-shifted modulation method, the proposed technique simplifies comparators and logic gates while keeping the benefit of fast sensorless voltage balancing and, consequently, the capacitor size reduction. In other words, it modifies the reference signal to achieve the fast voltage balancing of the auxiliary capacitor in PUC5. Simulation results are shown to investigate the effectiveness of the proposed technique.

Power electronics converters (PEC) play a crucial role in interfacing renewable energy systems and electrolyzers to ensure a high production yield of green hydrogen. The design of such PEC is not straightforward due to the safety hazards of using multiple electrolyzer stacks and converter modules at industrial levels. Therefore, real-time simulations should be conducted to ensure the converter design satisfies all the requirements before deploying it on-site. This paper presents a real-time digital twin (RTDT) of a 10 kW dual-active bridge converter interfaced with an electrolyzer. OPAL-RT simulator (eHS toolbox) is used for RTDT. Finally, the voltage across the series inductance and current flowing through it are presented for the open-loop operation of DAB.

Electrolysis requires a high DC current at low voltage to produce hydrogen from water. Designing power converters for such a load requirement could be challenging while fulfilling the galvanic isolation needs. Therefore, prior knowledge of the electrolyzer's impact on the converter operation should be needed. In this context, this paper investigates the behavior of the Dual Active Bridge (DAB) converter when utilized for electrolysis. A MATLAB simulation of DAB with a 10 kW alkaline electrolyzer is developed. Several converter parameters, such as the phase shift angle, series inductance, peak and RMS currents, and voltage gain, are analyzed during electrolysis. Distinct operating behavior is observed from the analysis.

This study proposes the application of a Lyapunov-based Model Predictive Control (L-MPC) approach to a 9-level Crossover Switches Cell (CSC9) converter operating in grid connection mode. The proposed method utilizes the structure of the classical finite-control-set MPC (FCS-MPC) technique while integrating a cost function that requires no tuning. By deriving the cost function based on Lyapunov theory, the system stability is ensured. Notably, the suggested approach offers several advantages over traditional MPC controllers. Firstly, it eliminates the need for gain tuning, thereby simplifying the implementation process. Secondly, the proposed controller prioritizes stability as a key design aspect. The presented simulation results prove that the proposed controller effectively regulates the voltage of the DC capacitor around its desired value and feed a smooth sinusoidal current to the grid with low total harmonic distortion (THD) while operating at a unity power factor.

In this paper, an optimized auto-tuning of Finite Control Set-Model Predictive Control (FCS-MPC) is proposed for a 9-level Crossover Switches Cell (CSC9) inverter. The system under study, a grid-connected single-phase CSC9 inverter-based PV system, is designed to extract maximum power from the PV panels and feed it to the grid with unity power factor and low current total harmonic distortion (THD). These objectives are achieved while regulating the CSC capacitor’s voltage at its reference value to maintain the 9 voltage levels at the inverter output terminals. In the cost function design, the minimization of the switching transitions along with the errors on the capacitor voltage and grid current (consequently current THD) were selected as control objectives, where the higher priority was given to the latter. The objective of reducing the switching events is assumed to have the least priority while the weighting factor on the capacitor voltage is dynamic and its value is determined by a pre-defined polynomial. Moreover, the optimization of the cost function is performed over two-step prediction horizon. The performance of the proposed control design (current THD enhancement and switching transitions reduction) is compared in simulation with the fixed weighting factor and one-step horizon without switching transitions constraint FCS-MPC case scenario.

In this paper, a finite-control-set model predictive controller (FCS-MPC) is designed for a grid-connected single-phase crossover switches cell (CSC) multilevel inverter (MLI). The CSC inverter is a modified 3-cell packed-U-cells (PUC) MLI by adding two crossover switches between the two DC-link and the flying capacitor. This modification allows the CSC to generate an output voltage with a peak value greater than the value of the DC source voltage (boost capability). The proposed FCS-MPC is designed, by selecting the appropriate weighting factor values for different design parameters, to inject current to the grid at unity power factor and low total harmonic distortion (THD) while regulating the capacitor voltage at the reference level. The proposed FCS-MPC is validated in simulation where the presented results show a high dynamic performance and capability of dealing with a multi-objective control problem at different operating conditions.

In this paper a fixed-switching frequency Pulse width modulator (PWM) based-Sliding Mode Control (SMC) is proposed and applied to a single phase/Five-Level/Sensor-less Packed U-Cell (PUC5) interfacing the utility. The new design takes the advantage of chattering compensation when Gao's reaching law is adopted. SMC-based controller takes in action of maintaining the utility current at a desired reference value with unity power factor and fixed-switching frequency operation. Due to self-voltage balancing feature of PUC5 inverter, auxiliary DC capacitor voltage is regulated through redundant switching states while no sensor, neither regulator are needed. The overall SMC-PWM proposed controller is less complex, more robust towards external disturbances making it suitable for single-phase renewable energy systems interfacing the utility. Simulation results on MATLAB/Simulink are provided to confirm the effectiveness and robustness of the proposed controller.

This paper proposes a novel sensor-less switching method based on logic gates for a five-level packed U-cell (PUC5) converter. It comprises only two level-shifted triangular carriers and logic gates. Hence, the number of triangular carriers is halved and the switching states table is eliminated, which cause remarkable reduction in complexity of the proposed modulation method. Moreover, employing the proposed sensor-less switching method leads to decrease in the PUC5 capacitor value by a factor of carrier ratio, fast self-balancing of the PUC5 capacitor voltage, and halving the output LC filter inductor and capacitor values in stand-alone mode, as well as the grid-link inductor value in grid-connected mode. In addition, the PUC5 converter start-up transient time is considerably decreased and the first switching harmonic cluster frequency is doubled, which lead to notable improvement of steady-state and dynamic performances of the PUC5 converter. The proposed sensor-less switching method has been implemented in both stand-alone and grid-connected operating modes of PUC5 converter. Provided simulation and experimental results verify the feasibility and effectiveness of the proposed sensor-less switching method as well as its improved dynamic and steady-state performances in both stand-alone and grid-connected modes.

In this paper, a novel sensor-less logic-equation-based modulation method for grid-connected PUC5 converter has been proposed. It consists of only two triangular carriers and logic equations, in which the number of triangular carriers is halved and the switching states table is eliminated. Hence, the complexity of the proposed modulation method is remarkably reduced. Moreover, by employing the proposed modulation method, the capacitor value of PUC5 converter is decreased by factor of carrier ratio, faster self-balancing of capacitor is achieved, and the PUC5 converter start-up transient time is considerably decreased. In addition, first switching harmonic cluster frequency is doubled, which leads to halving the grid link inductor size. Hence, notable improvement of steady-state and dynamic performance of grid-connected PUC5 converter is obtained. The provided simulation results confirms the performance and feasibility of the proposed sensor-less logic-equation-based switching method for grid-connected PUC5 converter.

This paper presents the design of space vector modulation (SVM) technique to control the switches of single phase sensor-less 5-level Packed U-Cell inverter (PUC5) along with voltage balancing at flying capacitor. To generate five equal voltage levels at the output waveform, which results in reducing total harmonic distortion (THD) the switches of PUC5 should be properly triggered. Utilizing SVM technique by tuning the interval time among the state vectors on PUC5 inverter is discussed at this paper for voltage balancing at auxiliary capacitor. Moreover, appropriate patterns of switching states are used in this paper to reduce the switching losses by minimizing the transition from one state to another state. Simulation results by MATLAB Simulink are presented to validate the capability of proposed modulation technique. Furthermore, a comparison between the results of level shift pulsed width modulation technique (LS-PWM) and SVM is carried out to demonstrate the lower power loss of SVM.

Multilevel inverters (MLIs) are known as one of the most widely used power converters in power electronic fields. This study proposes a new voltage source inverter (VSI) for MLI with reduced number of components. The recommended MLI is implemented with 8 DC links and 18 switches, which generates 33 output voltage levels in asymmetric source configuration. All voltage levels (positive, negative and zero) are synthesized at the output terminals without any additional circuit. Cascaded connection of the topology is also proposed. Compared with other conventional and recently invented topologies, it uses less number of components. The accuracy performance of the suggested MLI in synthesizing the positive, negative and also zero voltage levels is verified over the simulation results (MATLAB/SIMULINK software) on a 33-level inverter.

This paper presents a thorough study on Five-Level Packed U-Cell inverter called PUC5. The main advantage of PUC5 topology over other popular multilevel ones is the redundant switching states, which facilitate the voltage balancing of the flying capacitor in its configuration. Switching states of the PUC5 inverter are analyzed to ensure an easy voltage balancing process. That voltage controlled auxiliary capacitor helps generating five identical voltage levels at the output using a single DC source. A full comparison is done to other 5-level inverter topologies to reveal the dominant features of the PUC5 structure. Moreover, some discussion on the controller design for the PUC5 inverter is conducted in grid-connected applications which indicates similar procedure performed for conventional 2-level ones due to featuring single-dc-source configuration. Various experimental results are shown in each discussion for better understanding.

In this paper, a new 11-level topology of symmetrical Multilevel Inverters (MLIs) is proposed. The proposed topology offers reduced number of components as compared with conventional and recently published topologies. The Selective Harmonic Elimination (SHE) is adapted for switching modulation that removes undesired harmonics. A comparative analysis of proposed topology with other proposed topologies has been made in terms of number of switches, diodes, required driver circuit and DC voltage sources. The topology can be easily extended in three parts because of its modularity and extendibility to increase the output voltage levels. The feasibility of the proposed topology is verified by simulating the topology using MATLAB/Simulink, and also the high performance of the proposed topology has been validated experimentally.

A cascaded H-bridge multilevel inverter offers important advantages over the conventional two-level topologies, though it necessitates isolated input dc sources. Even power distribution amongst these sources is an important control issue for an enhanced life-time of the overall system. In currently used control schemes, for `n' number of input sources and a fundamental period `T' for the output voltage, average power drawn from each source become equal after cyclic time spans of `n*T'. In this paper, a methodology is presented using which these spans are reduced to `T', irrespective of the number of input sources. In the proposed scheme, sine-triangle pulse-width-modulation (SPWM) technique has been espoused to obtain a `multilevel reference signal'. This signal is further manipulated, so as to impart flexibility for the selection of redundant states. Actual driving signals for the power switches are then derived from the manipulated multilevel reference signal, utilizing chosen states such that the respective average currents drawn from the input sources are repeatedly equalized within one power cycle of the output voltage. Such flexibility is not directly offered by the standard multilevel SPWM methods. Simulation and experimental results indicate that for two input sources and an output voltage of 50 Hz, the conventional `carrier rotation' scheme requires repeated time-spans of 0.04 sec for even power distribution whereas the proposed scheme requires only 0.02 sec. Thus, the proposed scheme leads to a better and effective utilization of sources, especially when the number of input sources is large.

In this paper a new post fault operation strategy is proposed for modular multilevel converter (MMC). The conventional MMC fault tolerant operation methods use redundant cells in spinning or cold reserve schemes, however in this work the MMC fault tolerant operation is achieved without requiring any redundant cells. The introduced strategy modifies capacitors reference voltages and arms modulation reference waveforms in faulty leg of MMC while other legs operate normally. The applied technique leads to having some degree of overvoltage in faulty leg capacitors which could be neglected since the number of cells is high. Simple realization and significant economic savings would be attained as main advantages of the proposed post fault operation strategy because of no need to redundant cells. Simulation results verify the good dynamic performance of the implemented technique.

This paper presents a solar energy processor based on Packed U-Cells inverter for grid applications. The proposed single phase multilevel inverter PUC allows the generation of 7-level output voltage. Two control techniques are used in this work. MPPT is applied on the PV in order to extract the maximum power, while the aim of MPC or the model predictive control is to balance three variables in the system; the grid current, the capacitor voltage in the PUC as well as the BOOST output voltage. The feasibility of the designed system is validated by simulation using Matlab-Simulink-SimPowerSystems.

This paper introduces a new control scheme based on a Finite Set-Model Predictive Control (FS-MPC) and aims of a fixed switching frequency operation. The proposed scheme allows of obtaining a voltage vector that is responsible of nullifying the cost function's derivative for its optimization. Moreover, a closed-loop space vector modulation (SVM) based on the proposed predictive control scheme is introduced for a three-level grid connected inverter. The proposed algorithm that injects a desired current to the grid is investigated through external perturbations such as change in the line current amplitude as well as DC voltage variation. Discrete-time system model was developed and simulated. Simulation results on MATLAB/Simulink are provided to verify the fast dynamic performance, and good voltage balancing of DC bus capacitors of the NPC inverter.

The newly emerged packed U-cell (PUC5) inverter topology is investigated in this paper considering the design criteria, switching technique, voltage balancing of DC capacitor and switches voltages ratings. Afterwards, It is compared with other popular multilevel inverter topologies such as 3-level full-bridge (FB), 5-level cascaded H-bridge (CHB), neutral point clamped (NPC) and T3, in terms of components count, voltage balancing complexity, voltage rating, switching frequency, etc. in continue, the 3-phase configuration of the PUC5 inverter is presented and its proper application would be discussed. Some experimental results are shown to accredit the performance of the 3-phase PUC5 inverter in 3-wire and 4-wire systems to supply 1-phase and 3-phase AC loads.

Multilevel inverters are the new structures of power electronic circuits that are used in high voltage DC-AC conversion systems. These kinds of inverters create more output voltage levels in which reduce the harmonic components. In this paper, a new three source multilevel inverter is proposed that consists of eight switches in basic structure. Proposed topology is aimed in symmetrical and asymmetrical state that can produce 7 and 11 levels in symmetrical and asymmetrical case, respectively. Modularity and extendibility are two important features of the proposed structure, so that the output voltage levels can be increased significantly. The Selective Harmonic Elimination (SHE) is utilized for switching modulation that omits selected harmonics. A comparative study between proposed structure, conventional topologies and recent ones with due attention to number of components is established. The proposed structure is simulated in MATLAB/Simulink software and a prototype is implemented in laboratory to validate the operation of the converter. The simulation and experimental results verify the accurate and proper performance.

In this paper, a new mode of operation has been introduced for packed U-cell (PUC) inverter. A sensor-less voltage control based on redundant switching states is designed for the five-level packed U-cell (PUC5) inverter, which is integrated into switching process. The sensor-less voltage control is in charge of fixing the dc capacitor voltage at half of the dc source value results in generating symmetric five-level voltage waveform at the output with low harmonic distortion. The sensor-less voltage regulator reduces the complexity of the control system, which makes the proposed converter appealing for industrial applications. An external current controller has been applied for grid-connected application of the introduced sensor-less PUC5 to inject active and reactive power from inverter to the grid with arbitrary power factor, while the PUC auxiliary dc bus is regulated only by sensor-less controller combined with new switching pattern. Experimental results obtained in stand-alone and grid-connected operating modes of proposed PUC5 inverter prove the fast response and good dynamic performance of the designed sensor-less voltage control in balancing the dc capacitor voltage at desired level.

Presents corrections to various diagrams and figures in the paper, "Sensor-Less Five-Level Packed U-Cell (PUC5) Inverter Operating in Stand-Alone and Grid-Connected Modes," (Vahedi, H., et al), IEEE Trans. Ind. Informat., vol. 12, no. 1, pp. 361-370, 2016.

In this paper, Selective Harmonic Mitigation (SHM) and Selective Harmonic Elimination (SHE) modulation techniques are combined to generate the appropriated firing pulses for a 4-leg 3-Level Neutral Point Clamped (NPC) inverter. SHM modulation technique is applied to the phase legs in order to get a desired modulation index (ma) and to mitigate the lower order odd non-triplen harmonics (5th, 7th, ...) while the fourth leg firing pulses are generated using SHE modulation technique to eliminate the major low order odd triplen harmonics (3rd, 9th, ...) completely. It is demonstrated that this hybrid modulation technique can reduce significantly a vast range of harmonic orders in the NPC inverter output voltage when compared with the results achieved when using only SHE modulation technique in the four legs of the inverter. To avoid the generation of odd non-triplen harmonics in the SHM phase legs that can not be eliminated with the fourth SHE leg, the Simulated Annealing (SA) heuristic algorithm used to find the SHM switching angles is tuned in order to provided suitable oddnon-triplen harmonics distortions which can be eliminated with SHE technique. Moreover, since in dynamical applications the modulation index has to be changing continuously, the SA algorithm has also been designed in order to provide a smooth switching angles set to avoid undesired transients harmonic contents.

A single-dc-source 5-level cascaded H-bridge (CHB) inverter is studied in this paper. All possible switching sequences are analyzed and a sensor-less voltage balancing approach is proposed that regulates the second dc bus (capacitor) voltage at half of the first dc bus amplitude (isolated dc source). The output voltage levels include zero, capacitor voltage and the dc source amplitude. The simple sensor-less voltage balancing technique is integrated into switching method which makes it easy to implement using even cheap microcontrollers. Simulation results validate the good dynamic performance of the proposed sensor-less voltage controller in regulating the capacitor voltage at the desired level to generate 5-level asymmetric voltage waveform at the inverter output low harmonics contents.

Packed U-Cell (PUC) converter has been introduced as a 7-level converter in early 2008. Since then, different analysis and projects have been performed on, including various applications such as inverter and rectifier, linear and nonlinear voltage controllers. In this paper, authors try to do a detail review on this topology covering all aspects like topology design in single and three-phase, operation concepts, switching sequences for different multilevel voltage waveform generation, modelling and etc. It is shown that this topology can be comparable to popular multilevel converters (CHB and NPC) in terms of device counts and applications. Moreover, some performed and published works about the PUC are mentioned to show its different industrial applications and some other converter topologies derived based on the PUC. Experimental results are provided to show the good performance of PUC converter in several applications.

This paper presents a 7-level cascaded H-bridge (CHB) multilevel inverter using a single DC source. The second DC bus is a capacitor that its voltage is controlled by switching sequences. The capacitor voltage is regulated at half of the DC source amplitude to have seven voltage levels at the output. Seven voltage levels include each DC bus voltage, their sum and subtraction. Switching pattern is designed based on the redundant switching states and multicarrier level-shifted pulse width modulation (PWM) technique to help controlling the capacitor voltage at the desired level. Simulation results are presented to validate the effective voltage balancing procedure integrated into switching technique and consequently generating the 7-level voltage waveform at the output with low harmonic contents.

Three-phase four-leg neutral point clamped (NPC) inverter is more suitable in dealing with all sort of the loads especially unbalanced/nonlinear due to harmonics issues. Most control strategies applied on four-leg NPC are classified as high switching frequency lead to high power losses and low efficiency. In this paper, selective harmonic elimination pulse width amplitude modulation (SHE-PWAM) technique has been implemented on a four-leg NPC inverter to reduce the switching frequency properly. In SHE-PWAM technique, the amplitude of input voltage is considered flexible in order to eliminate one more harmonic order without increasing switching frequency. The obtained switching angles of phase legs and amplitude of input voltage are used to eliminate the non-triplen harmonics (5th,...,23th) from the output voltage. On the other hand, switching angles calculated for the fourth leg are considered to eliminate the triplen harmonics (3th,...,21th) from phase voltage. The performance of proposed technique is verified by Matlab/SPS simulations.

In this paper a novel model of the packed U-cell (PUC) inverter is derived considering the concept of single-phase multilevel converters. Based on the proposed model, a voltage balancing controller is designed to apply on the 7-level PUC inverter. The applied controller is in charge of fixing the capacitor voltage in PUC structure at a desired value to have the seven levels of the voltages at the output. The 7-level pulse width modulation (PWM) technique is used to produce the associated pulses for firing the PUC switches. The performance of the introduced controller is investigated via simulations in various conditions including changes in the load and DC bus voltage variations. The results prove the ability of the good dynamic performance and fast response of the controller in stable and unstable conditions.

Renewable energy resources are widely used because of providing green and economic energy for the consumers. Multilevel inverters generates low harmonic waveforms at the output, therefore they are most suitable for energy conversion to deliver efficient power to the loads from renewable energy sources like photovoltaic systems. In this paper a new dc source less topology has been introduced for multilevel inverters. It uses crossover switches to generate the maximum output voltage levels. The Crossover Switches Cell (CSC) multilevel inverter can generate all possible voltage level among the DC supply and regulated DC voltage capacitor. A voltage controller has been proposed to keep the DC capacitor voltage regulated in case of load changes. The simulation results prove the capability of CSC in producing maximum voltage levels as well as the controller ability in balancing the capacitor voltage even if the DC supply voltage changes.

High power applications need high efficiency devices to produce lower power losses and harmonics while meeting the limitation of voltage and current. Multilevel inverters generate smoother and higher voltage at the output with lower harmonics. They can deliver high power while using medium-voltage switches. In this paper a Pinned Mid-Points (PMP) multilevel inverter topology is introduced and studied which is derived from a Bidirectional Neutral Point Clamped (BNPC) three-level inverter. The proposed PMP multilevel inverter has fewer switches and clamping diodes than the Cascaded H-bridge (CHB) and Neutral Point Clamped (NPC) inverters, moreover it has less bidirectional switches in comparison with the BNPC. Moreover, it can be extended to three-phase inverter same as a NPC only using three legs and common DC link. A five-level inverter using proposed topology is validated by Matlab/SimPowerSystems. It shows the appropriate results of voltage and current as well as their THD%.

Three simple methods for rotor resistance identification in sensorless indirect field-oriented control of an induction motor drive are presented and compared. Two of the three techniques namely, electromagnetic torque equation, and reactive power are based on the generalization of existing methods. Authors propose the thired method, namely, active power equation which is an improvement over the existing schemes. Although all three schemes estimate the rotor resistance effectively, the proposed technique is superior to others in providing faster estimation approach. The proposed method will be analyzed along with other previously proposed MRAS based methods, and the advantage and limitations of each will be discovered. Simulation results of all three methods will be provided for comparison.

A practical concern with implementing the fixed band hysteresis current control in active power filters (APF) is its variable switching pattern that results in increasing the risk of occurrence of resonance in power systems. To avoid this situation, adaptive hysteresis current control methods with the variable hysteresis bands have been recommended in literature. However, these methods impose an absolutely huge amount of complex computations on the system which, in turn, slows down its response time and thereby, limits the switching frequency. This paper devises a novel fixed-band fixed-frequency (FBFF) hysteresis current control strategy that aims to eliminate completely the mentioned calculations while keeps merits of the adaptive methods. In other words, the suggested strategy employs an algorithm that is similar to the fixed-band variable-frequency hysteresis methods; however, the outcomes are identical to the variable-band fixed-frequency hysteresis current control techniques. Employing the proposed FBFF method to control an APF leads to an accurate modulation performance with the least possible calculations required in a filtering procedure. Several simulations are done using MATLAB/Simulink to verify validity of the proposed method.