Active object tracking adjusts camera poses to keep single target within field-of-view, and therefore is more complex than video object tracking. In this paper, we propose KDAOT, a knowledge driven active object tracking framework in complex scenarios like occlusion. Firstly, we utilize multi-view object appearance with occlusion knowledge. Secondly, We model view angle switches using Markov chain and select effective view angle. Thirdly, we store and predict target movements and adversarial tendency to hide from camera surveillance in trajectory knowledge. Camera pose actions are determined by artificial potential fields of these hybrid knowledge. We construct three meta-verse environments for experiments, namely, Room, Forest and Yard. Results validate the overall effectiveness of our method.

Pedestrian detection in crowded scenes is a challenging problem. To avoid missing targets in a crowd, a high non-maximum suppression (NMS) threshold is necessary. However, a high NMS threshold may lead to a large number of false positives (FP), which results in serious degradation of pedestrian detection performance. In this paper, we propose a novel label assignment scheme for one-stage detectors, called CrowdAssign, which focuses on FP suppression. Firstly, we analyze the sources of FPs and classify them into different categories. Secondly, we examine the cause of different types of FP and develop a dynamic classification label adjustment strategy, which aims to reduce the confidence of the positive samples with high risk of being FPs. With our robust label assignment scheme, a single FCOS-ResNet-50 detector can reach $45.0 \ M R^{-2}$ on CrowdHuman under 1x schedule and outperforms state-of-the-art label assignment methods. Experiments on Citypersons demonstrate the desired generalization ability of our algorithm.

In this paper we introduce the Mozart Processor, which implements a new processing paradigm called Reuse Exposed Dataflow (RED). RED is a counterpart to existing execution models of Von-Neumann, SIMT, Dataflow, and FPGA. Dataflow and data reuse are the fundamental architecture primitives in RED, implemented with mechanisms for inter-worker communication and synchronization. The paper defines the processor architecture, the details of the microarchitecture, chip implementation, software stack development, and performance results. The architecture's goal is to achieve near-CPU like flexibility while having ASIC-like efficiency for a large-class of data-intensive workloads. An additional goal was software maturity --- have large coverage of applications immediately, avoiding the need for a long-drawn hand-tuning software development phase. The architecture was defined with this software-maturity/compiler friendliness in mind. In short, the goal was to do to GPUs, what GPUs did to CPUs --- i.e. be a better solution for a large range of workloads, while preserving flexibility and programmability. The chip was implemented with HBM and PCIe interfaces and taken to production on a 16nm TSMC FFC process. For ML inference tasks with batch-size=4, Mozart is integer factors better than state-of-the-art GPUs even while being nearly 2 technology nodes behind. We conclude with a set of lessons learned, the unique challenges of a clean-slate architecture in a commercial setting, and pointers for uncovered research problems.

Abstract With the rapid development of mobile phones, more and more high‐resolution photos are taken. The demand for high‐resolution image inpainting is becoming increasingly urgent. In order to repair high‐resolution face images automatically and quickly, this paper proposes an improved generative adversarial networks method. Firstly, we made a high‐resolution dataset for training and testing, and abandoned the traditional 256256 size data. Secondly, since the existing methods can only repair the mask with fixed size and shape on the image, when the global average pooling layer is used in the network, the improved network can repair the moles and acne with arbitrary sizes and shapes on the human face photos. Finally, in order to achieve optimal performance of the network, a mixed loss function is used in training. The experimental results prove that our method has not only achieved good results in qualitative results, but also achieved excellent results in quantitative results.

Graphic processing unit (GPU)-based general-purpose computing is developing as a viable alternative to CPU-based computing in many domains. Today’s tools for GPU analysis include simulators like GPGPU-Sim, Multi2Sim, and Barra. While useful for modeling first-order effects, these tools do not provide a detailed view of GPU microarchitecture and physical design. Further, as GPGPU research evolves, design ideas and modifications demand detailed estimates of impact on overall area and power. Fueled by this need, we introduce MIAOW (Many-core Integrated Accelerator Of Wisconsin), an open-source RTL implementation of the AMD Southern Islands GPGPU ISA, capable of running unmodified OpenCL-based applications. We present our design motivated by our goals to create a realistic, flexible, OpenCL-compatible GPGPU, capable of emulating a full system. We first explore if MIAOW is realistic and then use four case studies to show that MIAOW enables the following: physical design perspective to “traditional” microarchitecture, new types of research exploration, and validation/calibration of simulator-based characterization of hardware. The findings and ideas are contributions in their own right, in addition to MIAOW’s utility as a tool for others’ research.