Jacob Lambert 0002

dblp:165/6088-2 · DBLP profile ↗
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3ranked-venue papers
3as first author
1since 2021 · last 2021
0000-0002-6992-3650ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 3 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 87% High-performance computing · 13%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing › parallel programming models
directive-based programming
0.412020
CCAMP: an integrated translation and optimization framework for OpenACC and OpenMP · SC 2020
Parallel and multicore computing
parallel programming models
0.412020
CCAMP: an integrated translation and optimization framework for OpenACC and OpenMP · SC 2020
High-performance computing › performance engineering
performance portability
0.112020
CCAMP: an integrated translation and optimization framework for OpenACC and OpenMP · SC 2020

Methods — techniques the papers use, named apart from their topics

directive optimization · 0.4compiler translation · 0.4
YearPublicationVenuePosition
2021 Optimization with the OpenACC-to-FPGA framework on the Arria 10 and Stratix 10 FPGAs
Jacob Lambert 0002, Seyong Lee, Jeffrey S. Vetter, Allen D. Malony
Parallel Comput.1
2020 CCAMP: an integrated translation and optimization framework for OpenACC and OpenMP
abstract
Heterogeneous computing and exploration into specialized accelerators are inevitable in current and future supercomputers. Although this diversity of devices is promising for performance, the array of architectures presents programming challenges. High-level programming strategies have emerged to face these challenges, such as the OpenMP offloading model and OpenACC. However, the varying levels of support for these standards within vendor-specific and open-source tools, as well as the lack of performance portability across devices, have prevented the standards from achieving their goals. To address these shortcomings, we present CCAMP, an OpenMP and OpenACC interoperable framework. CCAMP provides two primary facilities: language translation between the two standards and device-specific directive optimization within each standard. We show that by using the CCAMP framework, programmers can easily transplant non-portable code into new ecosystems for new architectures. Additionally, by using CCAMP's device-specific directive optimizations, users can achieve optimized performance across architectures using a single source code.
Jacob Lambert 0002, Seyong Lee, Jeffrey S. Vetter, Allen D. Malony
SC1
2018 Directive-Based, High-Level Programming and Optimizations for High-Performance Computing with FPGAs
abstract
Reconfigurable architectures like Field Programmable Gate Arrays (FPGAs) have been used for accelerating computations from several domains because of their unique combination of flexibility, performance, and power efficiency. However, FPGAs have not been widely used for high-performance computing, primarily because of their programming complexity and difficulties in optimizing performance. In this paper, we present a directive-based, high-level optimization framework for high-performance computing with FPGAs, built on top of an OpenACC-to-FPGA translation framework called OpenARC. We propose directive extensions and corresponding compile-time optimization techniques to enable the compiler to generate more efficient FPGA hardware configuration files. Empirical evaluation of the proposed framework on an Intel Stratix V with five OpenACC benchmarks from various application domains shows that FPGA-specific optimizations can lead to significant increases in performance across all tested applications. We also demonstrate that applying these high-level directive-based optimizations can allow OpenACC applications to perform similarly to lower-level OpenCL applications with hand-written FPGA-specific optimizations, and offer runtime and power performance benefits compared to CPUs and GPUs.
Jacob Lambert 0002, Seyong Lee, Jeffrey S. Vetter, Allen D. Malony
ICS1