A. Chattopadhyay

dblp:166/3275 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1973
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 56% Electronic design automation · 44%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture › microprogramming
control memory minimization
0.011973
On Control Memory Minimization in Microprogrammed Digital Computers · IEEE Trans. Computers 1973
Electronic design automation
logic synthesis
0.011973
On Control Memory Minimization in Microprogrammed Digital Computers · IEEE Trans. Computers 1973
Processor architecture and microarchitecture › microprogramming
microprogrammed control
0.011973
On Control Memory Minimization in Microprogrammed Digital Computers · IEEE Trans. Computers 1973
YearPublicationVenuePosition
1973 On Control Memory Minimization in Microprogrammed Digital Computers
abstract
The problem of minimizing the bit dimension of control memories in microprogrammed digital computers is considered in this paper. We start essentially with the same basic formulation as that of Grasselli and Montanari [2]. However, in order to minimize the computational requirements, we start directly with the set of maximum compatibility classes of microcommands whose number is usually small, and readily obtain near-minimal irredundant solutions. A minimal solution is then obtained from the irredundant solutions.
Dilip K. Banerji, A. Chattopadhyay
IEEE Trans. Computers3