Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Nir Shmuel

dblp:168/2597 · DBLP profile ↗
← Back
1ranked-venue papers
0as first author
0since 2021 · last 2015
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Interconnection networks and networks-on-chip · 87% Processor architecture and microarchitecture · 13%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Interconnection networks and networks-on-chip › router architecture
network-on-chip router
0.212015
Heterogeneous NoC Router Architecture · IEEE Trans. Parallel Distributed Syst. 2015
Interconnection networks and networks-on-chip › router architecture
shared buffer design
0.212015
Heterogeneous NoC Router Architecture · IEEE Trans. Parallel Distributed Syst. 2015
Processor architecture and microarchitecture
chip multiprocessor
0.112015
Heterogeneous NoC Router Architecture · IEEE Trans. Parallel Distributed Syst. 2015

Methods — techniques the papers use, named apart from their topics

simulation · 0.2formal proof · 0.2
YearPublicationVenuePosition
2015 Heterogeneous NoC Router Architecture
abstract
We introduce a novel heterogeneous NoC router architecture, supporting different link bandwidths and different number of virtual channels (VCs) per unidirectional port. The NoC router is based on shared-buffer architecture and has the advantages of ingress and egress bandwidth decoupling, and better performance as compared with input-buffer router architecture. We present the challenges facing the design of such heterogeneous NoC router, and describe how this router architecture addresses them. We introduce and formally prove a novel approach that reduces the number of required middle shared-buffers without affecting the performance of the router. In comparison with an optimal input-buffer homogeneous router, our NoC router improves saturation throughput by 6-47 percent for standard traffic patterns. The router achieves significant run-time improvement for NoC-based CMP running PARSEC benchmarks. It offers better scalability, area, and power reduction of 15-60 percent, for NoC based CMPs of size 4 × 4 up to 16 × 16, as compared with optimal input-buffer homogeneous and heterogeneous routers.
Yaniv Ben-Itzhak, Israel Cidon, Avinoam Kolodny, Michael Shabun, Nir Shmuel
IEEE Trans. Parallel Distributed Syst.5