In this paper, we present a fully integrated ring-oscillator (RO)-based temperature sensor for quantum computing applications. As the quantum states exhibit an exponential sensitivity to the on-die cryogenic temperature change, any such temperature variation due to, for example, local heating islands arising from the poor thermal conductivity of silicon should be monitored. For this purpose, we exploit a compact RO sensor placed in the vicinity of qubits. The proposed approach employs four differently sized oscillators and two VBGs to generate, in total, eight different temperature-dependent oscillating frequency signals. Then, by performing their polynomial fitting, a linear temperature-frequency compensating model for the proposed sensor is derived. Fabricated in 22 nm FD-SOI technology, the proposed sensor occupies 0.0016 mm2, consumes 128 μW and achieves maximum inaccuracy of ± 2.1 K in a wide temperature range from 3 to 270 K.

In this paper, we present an inverter-based ring oscillator (RO) operating at cryogenic temperatures for quantum computing applications. It employs a low-dropout regulator (LDO) to provide supply voltage for a programmable switched-capacitor system which isolates the supply line of the integrated RO circuit from any noise or perturbations of the external power supply. In anticipation of embedding the RO into a phase-locked loop (PLL), we study the variation of flicker phase noise from cryo to room temperature by indirectly measuring the phase noise (PN) in the 30dB/dec region. The proposed system occupies 0.012mm2and shows 3.5dB integrated PN improvement thanks to the proposed voltage supply noise reduction technique at room temperature (RT) and the FOM is estimated as 121.7dB at cryogenic temperature (CT).

Optimal Transport (OT) has fueled machine learning (ML) across many domains. When paired data measurements $(\boldsymbol{\mu}, \boldsymbol{\nu})$ are coupled to covariates, a challenging conditional distribution learning setting arises. Existing approaches for learning a global transport map parameterized through a potentially unseen context utilize Neural OT and largely rely on Brenier’s theorem. Here, we propose a first-of-its-kind quantum computing formulation for amortized optimization of contextualized transportation plans. We exploit a direct link between doubly stochastic matrices and unitary operators thus unravelling a natural connection between OT and quantum computation. We verify our method (QontOT) on synthetic and real data by predicting variations in cell type distributions conditioned on drug dosage. Importantly we conduct a 24-qubit hardware experiment on a task challenging for classical computers and report a performance that cannot be matched with our classical neural OT approach. In sum, this is a first step toward learning to predict contextualized transportation plans through quantum computing.

In this paper, we study networks of coupled oscillators applied to the distributed synthesis of clock signals for large systems-on-chip. The oscillators are implemented as interconnected all-digital phase-locked loops (ADPLLs), which are asynchronous control systems. We address the issue of modelling, synchronization and stability of both a single ADPLL and interconnected ADPLLs. We prove that the stability domain is universal for large Cartesian networks, and it related to the domain for a single ADPLL. We show that within the stability domain the network synchronises to the reference signal both in frequency and phase. A hardware verification of Cartesian networks is presented, and it is consistent with our theoretical findings. The proposed design may be useful for multiples engineering and physics applications, including clock generation, distributed computations, beamforming, and other applications, where the control over time synchronicity is crucially important for the system performance.

In this paper we demonstrate electrostatic control and feasibility of entanglement in CMOS qubits. We present both single particle and multi-particle methodologies to describe quantum transport using a time-dependent Hamiltonian assuming one spatial degree of freedom. The developed models predict maximally entangled states of electrons controlled electrostatically by external driving fields and interacting via the Coulomb force.

This work is aimed at the development of a path-based approach to Statistical Static Timing Analysis. Timing Analysis is an absolutely essential step in the verification of Very Large Scale Integration (VLSI) designs. We propose a novel analytical methodology for the fast calculations of VLSI delay. The problem is stated in such a way that becomes equivalent to finding the maximum of a large set of correlated random variables (RVs). For this purpose, a corresponding extension of extreme value theory of weakly-correlated RVs is developed. Results of simulations showing a comparison of our approach with Monte Carlo simulations are presented. Possible applications, extensions of our methodology and future steps are discussed.

In this paper, we introduce a statistical approach for studying a special class of nonlinear dynamical systems such as ADPLLs and ADPLL networks, where the process driving the adjustment of the DCO frequency can be seen as ΣΔ modulation. We showed that, by applying the Frobenius-Perron operator to the governing equation, it is possible to find the invariant probability density which is valid for dynamically changing input of Σmodulator. By using this, we show that the average behaviour of the corresponding complex system can be dramatically simplified and studied analytically.

In this paper, we propose the model of a network consisting of All-Digital Phase-Locked Loop Network in application to Clock-Generating Systems. The method is based on a solution of a system of non-linear finite-difference stochastic equations and allows us to perform high speed simulations of a distributed Clock Network on arbitrary topology. The result of our analysis show a good agreement with experimental measurements of a 65nm CMOS All-Digital Phase-Locked Loop Network.

In this paper we consider a network of phase oscillators. We develop the equations that model the time evolution of the phase of each oscillator in the network. The oscillator represents a modified Kuramoto oscillator and in this study we discuss how these modifications are obtained. In the context of this study, we use this network to model a network of PLLs for distributed clock applications. We analyse analytically and numerically the synchronisation modes of this system for different types of the coupling function. We show that depending on the properties of the coupling function, the network displays either multiple coexisting synchronisation modes or only a single synchronisation mode. While in the context of clock generation, multiple synchronisation modes coexisting in the system at the same parameters are a parasitic phenomenon. However in the context of other application such as associative memory models, mode-locking can be seen a useful phenomenon. The results provide a deeper understanding of globally synchronised clock networks with applications in microprocessor design.