EDBT 2026 Demo / reviewers in the wild / expert
Yasir Ali Shah
dblp:169/5731
· DBLP profile ↗
5ranked-venue papers
1as first author
4since 2021 · last 2024
0000-0002-5156-5840ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 1 first-author · 4 since 2021Artificial intelligence and machine learning · 1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | Efficient Soft Core Multiplier for Post Quantum Digital SignaturesabstractMultiplication is a core operation in various applications such as cryptography and machine learning. Dedicated DSP blocks are provided by FPGA vendors for multiplication. However, these DSP blocks are limited in number and their location on FPGA is fixed, resulting in routing delays that affects the performance for small size multipliers. In this paper, a high performance and resource efficient 5 × 5 multiplier is presented that utilizes lookup tables (LUTs) and fast carry chain of the FPGA. The proposed multiplier offers 30% reduction in LUTs compared to Vivado DSP-less inferred multiplier at the cost of a slight increase in critical path delay (CPD). The proposed multiplier requires lesser power consumption and has better area- delay product (ADP) and power-delay product (PDP) metrics. Based on the proposed multiplier, a finite field multiplier is developed for post quantum digital signatures such as QR-UOV, MAYO and MQOM. The matrix-vector architecture is the core operation in multivariate digital signatures and integration of our finite field multiplier in a matrix-vector architecture shows that area is almost halved compared to state-of-the-art. Yasir Ali Shah, Ciara Rafferty, Ayesha Khalid, Safiullah Khan, Khalid Javeed, Máire O'Neill |
ISCAS | 1 |
| 2024 | GMC-crypto: Low latency implementation of ECC point multiplication for generic Montgomery curves over GF(p)
Khalid Javeed, Yasir Ali Shah, David Gregg |
J. Parallel Distributed Comput. | 2 |
| 2023 | Efficient, Error-Resistant NTT Architectures for CRYSTALS-Kyber FPGA AcceleratorsabstractThe dawn of cost-effective miniaturised satellites is currently attracting venture capital in a never seen before ratio to launch mega-constellations of satellites for a diverse range of applications. These satellites are vulnerable to attacks by high-capability cyber-criminals (including quantum enabled adversaries), due to the critical data they transmit. Additionally, space missions have long lifespan and a long lead time in terms of development process, requiring a pre-emptive outlook to ensuring their safety. In 2016, National Institute of Standards and Technology (NIST) initiated the competition to standardise the post-quantum cryptography (PQC) schemes, announcing the first portfolio of chosen schemes in 2022. This work targets the only public key exchange (PKE) scheme among the winners of the NIST-PQC standardisation process, CRYSTALS-Kyber, and implements its core bottleneck operation, i.e., number theoretic transform (NTT) extensively used for the polynomial multiplication. To avoid data corruption due to space based radiations, a novel error-resistant model for NTT is presented based on hybrid protection mechanisms, i.e., the use of hamming codes for detection and correction of errors in the twiddle factors and the use of parity computed for all NTT coefficients for error detection. Benchmarking error protection overheads on a Xilinx Virtex-7 FPGA reports 16.4% and 10.8% degradation on the hardware efficiency when the hamming codes for twiddle factors and parity bit for NTT coefficients are used to mitigate errors, respectively. A total of 29.2% area overhead is benchmarked when compared to the standard unprotected NTT implementations. Safiullah Khan, Ayesha Khalid, Ciara Rafferty, Yasir Ali Shah, Máire O'Neill, Wai-Kong Lee, Seong Oun Hwang |
VLSI-SoC | 4 |
| 2022 | VLCC-Q: Very low computational complexity optical interconnect architecture with queueing for reducing delay and back pressure probability in data center networksabstractSummary An architecture which promised very low computational complexity for optical interconnects in DCN was previously proposed, the very low computational complexity (VLCC) architecture. In this article, we present enhancement over VLCC architecture called very low computational complexity optical interconnect architecture with queueing (VLCC‐Q) architecture which represents M/D/64 output queue. Contention occurs at the destination if the source nodes which access the same destination node exceeds 64. The performance analysis is carried out through mathematical analysis, TCP simulation in NS2 and eye diagram of optical signal. The mathematical analysis gives theoretical bounds of optical switch, whereas TCP analysis gives practical situation results and eye diagram shows that optical signal is practically recoverable after the optical signal passes through various optical components of the optical interconnect. Results clearly show that VLCC‐Q outperforms VLCC architecture in terms of throughput increase, delay reduction and back pressure probability reduction. Mohsin Fayyaz, Yasir Ali Shah, Fayyaz Ahmed, Ghulam Mujtaba 0002 |
Concurr. Comput. Pract. Exp. | 2 |
| 2017 | K-means based multiple objects tracking with long-term occlusion handlingabstractThis study presents a novel multiple objects tracking (MOT) approach that models object's appearance based on K ‐means, while introducing a new statistical measure for association of objects after occlusion. The proposed method is tested on several standard datasets dealing complex situations in both indoor and outdoor environments. The experimental results show that the proposed model successfully tracks multiple objects in the presence of occlusion with high accuracy. Moreover, the presented work has the capability to deal long term and complete occlusion without any prior training of the shape and motion model of the objects. Accuracy of the proposed method is comparable with that of the existing state‐of‐the‐art techniques as it successfully deals with all MOT cases in the standard datasets. Most importantly, the proposed method is cost effective in terms of memory and/or computation as compared with that of the existing state‐of‐the‐art techniques. These traits make the proposed system very useful for real‐time embedded video surveillance platforms especially those that have low memory/compute resources. Muhammad Imran Shehzad 0001, Yasir Ali Shah, Zahid Mehmood, Abdul Waheed Malik, Shoaib Azmat |
IET Comput. Vis. | 2 |