Will Sherwood

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Demo Data from EDBT 2026 / reviewers in the wild / expert

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2ranked-venue papers

2as first author

0since 2021 · last 1981

—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems

2 papers

Electronic design automation · 95% Integrated circuit design · 5%

Topics — the 4 heaviest of 4, each with the papers that count most for it

Topic	Papers	Last	Evidence papers
Electronic design automation hardware verification and test	2	1981	A MOS modelling technique for 4-state true-value hierarchical logic simulation or Karnough knowledge · DAC 1981 A hybrid scheduling technique for hierarchical logic simulators or "Close Encounters of the Simulated Kind" · DAC 1979
Electronic design automation › hardware simulation hierarchical logic simulation	2	1981	A MOS modelling technique for 4-state true-value hierarchical logic simulation or Karnough knowledge · DAC 1981 A hybrid scheduling technique for hierarchical logic simulators or "Close Encounters of the Simulated Kind" · DAC 1979
Electronic design automation › hardware verification and test logic simulation	2	1981	A MOS modelling technique for 4-state true-value hierarchical logic simulation or Karnough knowledge · DAC 1981 A hybrid scheduling technique for hierarchical logic simulators or "Close Encounters of the Simulated Kind" · DAC 1979
Integrated circuit design digital circuit design	1	1981	A MOS modelling technique for 4-state true-value hierarchical logic simulation or Karnough knowledge · DAC 1981

Methods — techniques the papers use, named apart from their topics

four-state simulation · 0.0MOS modelling · 0.0hybrid scheduling · 0.0

Year	Publication	Venue	Position
1981	A MOS modelling technique for 4-state true-value hierarchical logic simulation or Karnough knowledge Will Sherwood	DAC	1
1979	A hybrid scheduling technique for hierarchical logic simulators or "Close Encounters of the Simulated Kind" Will Sherwood	DAC	1