Demo Data from EDBT 2026 / reviewers in the wild / expert
Wolfgang Coy
dblp:17/1783
· DBLP profile ↗
5ranked-venue papers
5as first author
0since 2021 · last 1980
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Theory of computation · 3 · 3 first-authorSystems, architecture and hardware · 2 · 2 first-authorDatabases, data management, data science and information retrieval · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 100% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
hardware verification and test |
0.0 | 2 | 1980 | A Remark on the Nonminimality of Certain Multiple Fault Detection Algorithms · IEEE Trans. Computers 1980 On the Design of Easily Testable Iterative Systems of Combinational Cells · IEEE Trans. Computers 1979 |
Electronic design automation › hardware test
multiple stuck-at fault detection |
0.0 | 1 | 1980 | A Remark on the Nonminimality of Certain Multiple Fault Detection Algorithms · IEEE Trans. Computers 1980 |
Electronic design automation › hardware verification and test
design for testability |
0.0 | 1 | 1979 | On the Design of Easily Testable Iterative Systems of Combinational Cells · IEEE Trans. Computers 1979 |
Electronic design automation › hardware verification and test › fault testing
stuck-at fault testing |
0.0 | 1 | 1979 | On the Design of Easily Testable Iterative Systems of Combinational Cells · IEEE Trans. Computers 1979 |
Electronic design automation › logic synthesis › logic network design
iterative logic array |
0.0 | 1 | 1979 | On the Design of Easily Testable Iterative Systems of Combinational Cells · IEEE Trans. Computers 1979 |
Electronic design automation
logic synthesis |
0.0 | 1 | 1979 | On the Design of Easily Testable Iterative Systems of Combinational Cells · IEEE Trans. Computers 1979 |
Methods — techniques the papers use, named apart from their topics
fault detection algorithm · 0.0AND-EXOR normal form · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1980 | A Remark on the Nonminimality of Certain Multiple Fault Detection AlgorithmsabstractPoage has constructed a complex fault detection algorithm which generates a complete and minimal test set of all multiple stuck-at faults of a given combinational network. Several authors have derived from his method fast and simple multiple fault detection algorithms, which are claimed to generate complete test sets with a "near-minimal" or "near-optimal" number of tests. We show that the algorithms by Bossen and Hong and the algorithm by Yang and Yau may generate test sets with an exponential number of tests (relative to the number of inputs) where a linear number of tests is sufficient for a complete multiple fault detection test set. Wolfgang Coy |
IEEE Trans. Computers | 1 |
| 1979 | On the Design of Easily Testable Iterative Systems of Combinational CellsabstractA design procedure is shown which allows the construction of one-dimensional iterative systems of combinational cells with good single stuck-at fault test complexity. Let S be a system where one of the M input words and two of the N states are defined for test purposes and the cells are realized as AND–EXOR normal form circuits, then S is testable with at most [log2(M x N) + 6] tests for all single faults and for any number of cells. A weaker restriction is shown, where no normal form realization is necessary, and which gives good testability for single or multiple stuck-at faults of the input/output and interconnection lines of cells. Wolfgang Coy |
IEEE Trans. Computers | 1 |
| 1977 | Automata in Labyrinths
Wolfgang Coy |
FCT | 1 |
| 1976 | A Note on the Automatic Generation of Inductive Assertions
Wolfgang Coy |
MFCS | 1 |
| 1976 | The Logical Meaning of Programs of a Subrecursive Language
Wolfgang Coy |
Inf. Process. Lett. | 1 |