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Don Dewitt

dblp:17/2459 · also Donald DeWitt, Donald Dewitt · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2009
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Reconfigurable computing and FPGAs · 100%
Interdisciplinary, comprehensive, and emerging computing
1 paper
Medical and health informatics · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Reconfigurable computing and FPGAs › FPGA-based embedded system
FPGA-based data acquisition
0.112009
FPGA-based front-end electronics for positron emission tomography · FPGA 2009
Medical and health informatics
medical imaging
0.012009
FPGA-based front-end electronics for positron emission tomography · FPGA 2009
Medical and health informatics › medical imaging › nuclear medicine imaging
positron emission tomography
0.012009
FPGA-based front-end electronics for positron emission tomography · FPGA 2009

Methods — techniques the papers use, named apart from their topics

statistical positioning · 0.2pulse timing · 0.2event localization · 0.2
YearPublicationVenuePosition
2009 FPGA-based front-end electronics for positron emission tomography
abstract
Modern Field Programmable Gate Arrays (FPGAs) are capable of performing complex discrete signal processing algorithms with clock rates above 100MHz. This combined with FPGA's low expense, ease of use, and selected dedicated hardware make them an ideal technology for a data acquisition system for positron emission tomography (PET) scanners. Our laboratory is producing a high-resolution, small-animal PET scanner that utilizes FPGAs as the core of the front-end electronics. For this next generation scanner, functions that are typically performed in dedicated circuits, or offline, are being migrated to the FPGA. This will not only simplify the electronics, but the features of modern FPGAs can be utilizes to add significant signal processing power to produce higher resolution images. In this paper two such processes, sub-clock rate pulse timing and event localization, will be discussed in detail. We show that timing performed in the FPGA can achieve a resolution that is suitable for small-animal scanners, and will outperform the analog version given a low enough sampling period for the ADC. We will also show that the position of events in the scanner can be determined in real time using a statistical positioning based algorithm.
Michael Haselman, Robert Miyaoka, Thomas K. Lewellen, Scott Hauck, Wendy McDougald, Don Dewitt
FPGA6