EDBT 2026 Demo / reviewers in the wild / expert
Guillaume Papaure
dblp:17/4368
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2006
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 56% Integrated circuit design · 44% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Compilers and program optimization › parallelization
thread-level speculation |
0.1 | 1 | 2006 | Poster reception - ASTEX: a hot path based thread extractor for distributed memory system on a chip · SC 2006 |
Integrated circuit design
system-on-chip |
0.1 | 1 | 2006 | Poster reception - ASTEX: a hot path based thread extractor for distributed memory system on a chip · SC 2006 |
Processor architecture and microarchitecture
thread partitioning |
0.1 | 1 | 2006 | Poster reception - ASTEX: a hot path based thread extractor for distributed memory system on a chip · SC 2006 |
Methods — techniques the papers use, named apart from their topics
speculative execution · 0.1hot path detection · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2006 | Poster reception - ASTEX: a hot path based thread extractor for distributed memory system on a chipabstractThe Automatic Speculative Thread Extractor, ASTEX, addresses the problem of partitioning C code into threads at compile time in order to map them onto System on Chip (SoC). The startpoint of thread extraction is to find the code region to implement as thread. In ASTEX it is based on program hot-paths detection. Then ASTEX construct a thread speculative model for each hot-path. Since ASTEX, contrary to previous work, doesn't assume shared memory, the speculation is performed on control flow and data layout also. The output is a set of threads characterized by their execution time, the code coverage, the amount of memory and communication required, etc. Our Experiments show that the approach is able to capture and to characterize the main computation kernels of embedded applications and how the hot path detection algorithm paremeter influence the final output layout. Éric Petit 0003, François Bodin, Guillaume Papaure, Florence Dru |
SC | 3 |