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Karl Schoder
dblp:172/0715
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10ranked-venue papers
1as first author
3since 2021 · last 2024
0000-0001-6227-8559ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 9 · 1 first-author · 3 since 2021Applied, interdisciplinary, general and emerging computing · 1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | Partial Virtual Damping Impedance Method Interface Approach for Power Hardware-in-the-Loop SimulationabstractPower hardware-in-the-loop (PHIL) simulation is a technique whereby actual power hardware is interfaced to a virtual surrounding system, simulated in real-time, through PHIL interfaces making use of power amplifiers and/or actuators. A number of interface approaches (IA) have been proposed in the literature for achieving the virtual coupling between the simulated and physical portions of the system, with the damping impedance method (DIM) often cited and employed due to its high stability and accuracy in cases in which the damping impedance can be closely matched to the impedance of the hardware of interest (HOI). However, in many cases, including many applications with power electronic converters, the impedance of the HOI is not easily represented by a passive network, as the converter controls may arbitrarily shape the impedance characteristic within the controllable bandwidth of the power converter. In this paper, a variation of the DIM IA is proposed in which the damping impedance is represented virtually as a voltage drop with the stimulus source, allowing arbitrary transfer function characteristics to be represented for the damping impedance. A variant is also proposed in which part of the damping impedance is represented virtually, and part of the damping impedance is represented explicitly with a passive network. An analysis of these approaches is provided to show the potential benefits and limitations of these approaches, illustrating these through practical examples. James Langston, Shunya Ishiguro, Harsha Ravindra, Kazuki Watanabe 0010, Karl Schoder |
IECON | 5 |
| 2024 | Advanced Hardware-in-the-Loop Testbed for Development of Grid Connected Medium Voltage Modular Multilevel ConverterabstractAdvancement in power electronic converters (PEC) are driven by the need for controllable, flexible, and compatible grid connected devices. In the medium voltage (MV) realm, modular multilevel converters (MMC) have become a favorite in the power systems industry for their suite of benefits. MMCs have been shown to operate as excellent high voltage conversion equipments and active front ends (AFE) in ac application. Furthermore, back-to-back (B2B) MMC configurations have been explored for use as IEEE 1547-2018 compliant direct-connected grid inverter. This paper demonstrates application of an advanced hardware-in-the-loop (HIL) testbed to test a MV PEC. The proposed HIL testbed unifies controller hardware-in-the-loop (CHIL) and power hardware-in-the-loop (PHIL) capabilities and enables MV MW-scaled development process for grid application. A third generation 10 kV silicon-carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET)-based MMC with a middle switching cell was developed using the process laid out in the paper, and experimental results from the HIL testbed operating at 250 kVA, 7 kVdc, 3.64 kV line-to-line rms 60 Hz are exhibited. Additionally, the developed MMC demonstrates robust response to IEEE 1547-2018 scenarios. From the results, the development methodology and the MMC are validated, providing excellent testing capability for future grid-connected devices. Sihun Song, Isabel Barnola, Qichen Yang, Karl Schoder, Matthew Bosworth |
IECON | 4 |
| 2024 | Electrical Design and Evaluation for a 10 kV SiC Power Module-Based Submodule of a Modular Multilevel ConverterabstractModular multilevel converter (MMC) is a highly suitable converter for medium- and high-voltage applications. Its structure is based on the series connection of many submodules (SMs). While the introduction of 10 kV SiC MOSFET modules has enabled higher voltage and switching frequencies for each SM using simple configurations, this also exacerbates operational challenges, including electrical stresses. Consequently, the design and evaluation of SMs under these conditions are crucial for ensuring reliable operation. This paper focuses on the electrical design and evaluation for a 10 kV SiC power module-based SM in a medium-voltage MMC with middle SMs. First, stray inductance of the PCB busbar with different connections are evaluated, providing guidance to select proper configuration with smaller stray inductance. Then, surface electric field intensity on the customized PCB busbar under various voltage stresses are evaluated to prevent partial discharge as much as possible. Finally, to evaluate the electric field distribution in the SM, electric fields of the entire core area of a SM, including the power module, gate drivers, PCB busbar, heatsink, and copper bars, are analyzed under full dc voltage and realistic switching stress with high dv/dt. The stray inductance and partial discharge characteristics of the PCB busbar are verified experimentally, which align with the design and evaluation results very well. The functionalities of all the individual SMs are experimentally verified by 55-min continuous operation under full voltage and rated output current. The functions of the SM were further confirmed in full-power tests of a downscaled 250 kVA MMC. Qichen Yang, Sihun Song, Nash Bonaventura, Isabel Barnola, Robin Ramin, Christoph Diendorfer, John Hauer, Matthew Bosworth, Karl Schoder, Michael Steurer |
IECON | 9 |
| 2019 | Distributed Optimal Dynamic State Estimation for Cyber Intrusion Detection in Networked DC MicrogridsabstractIn this paper, we present a novel distributed state estimation approach in networked DC microgrids to detect the false data injection in the microgrid control network. Each microgrid monitored by a distributed state estimator will detect if there is manipulated data received from their neighboring microgrids for control purposes. A dynamic model supporting the dynamic state estimation will be constructed for networked microgrids. The optimal distributed state estimation, which is robust to load disturbances but sensitive to false data injected from neighboring microgrids will be presented. To demonstrate the effectiveness of the proposed approach, we simulate a 12kV three-bus networked DC microgrids in MATLAB/Simulink. Residual information corresponding to the false data injected from neighbors validates the efficacy of the proposed approach in detecting compromised agents of neighboring microgrids. Tuyen V. Vu, Bang H. L. Nguyen, Tuan A. Ngo, Michael Steurer, Karl Schoder, R. Hovsapian |
IECON | 5 |
| 2018 | Analysis of Linear Interface Algorithms for Power Hardware- in - the- Loop SimulationabstractPower hardware-in-the-loop (PHIL) simulation is a technique whereby actual power hardware is interfaced to a virtual surrounding system, simulated in real-time, through PHIL interfaces making use of power amplifiers and/or actuators. A number of seemingly disparate interface algorithms (IA) have been proposed in the literature for achieving the virtual coupling between the simulated and physical portions of the system, with each presenting different strengths and shortcomings. In this work, a framework based on an architecture for bilateral teleoperation systems is described, which is suitable for the formulation of linear PHIL IAs, encompassing the majority of the existing IAs proposed in the literature. Formulations of a number of existing PHIL IAs are given in the context of the described framework. Requirements for achieving transparency with the IAs are described, and several of the existing IAs are discussed in terms of the framework, adherence to the transparency requirements, and performance. As the architecture also lends itself to the development of flexible IA modules for real-time simulators, the implementation and application of an IA module reflecting this architecture is also described. James Langston, Karl Schoder, Michael Steurer, Chris S. Edrington, Rodney G. Roberts |
IECON | 2 |
| 2018 | Testing Operation and Coordination of DC Solid State Circuit BreakersabstractAn approach for testing the operation and coordination of medium-voltage dc solid state circuit breakers (SSCB) for shipboard power systems is described. For the considered application, the rate of rise of current during a short-circuit is limited primarily by a small cable inductance. This high rate of rise, coupled with the need to interrupt the current prior to exceeding the limits of the power electronic switches in the SSCBs, necessitates a coordinated protection scheme which can isolate the fault within a matter of microseconds. Challenges in such tests include the high-voltage, high current, high rates of change of current, and the interconnection of devices within a system. Testing of the SSCBs in a system context presents a challenge, as the MVDC system to which these are to be applied has not been realized in hardware. In order to verify the operation of the SSCBs within a system context, a combination of tests and analyses are employed, including off-line simulation, controller hardware-in-the-loop simulation, hardware testing of a single SSCB, and coordination testing with multiple SSCBs. Results are described for testing of 1 kV devices, but the approach is developed to allow for extension for devices of higher voltage ratings. James Langston, Karl Schoder, Michael Sloderbeck, Michael Steurer, Andrew Rockhill |
IECON | 2 |
| 2018 | Large-Scale Distributed Control for MVDC Ship Power SystemsabstractIn this paper, we report on the utilization of advanced distributed control algorithms, deployed on physical controllers, for an Integrated Power and Energy System (IPES) energy management system. In addition, we provide an evaluation of the management system. Results from a hardware-in-the-Ioop experiment will be analyzed to show the effectiveness of the realtime control system. The goal of this paper is to provide valuable insights from a practical system controls the application of reasonable size and system complexity. Tuyen V. Vu, Dallas Perkins, David Gonsoulin, Chris S. Edrington, Behnaz Papari, Karl Schoder, Mark J. Stanovich, Michael Steurer |
IECON | 6 |
| 2015 | Role of Power Hardware in the Loop in Modeling and Simulation for Experimentation in Power and Energy SystemsabstractThe area of modeling and simulation is a critical aspect in the basic research to commercialization and instantiation cycle. This paper reports on modeling and simulation in the context of verification, validation, and experimentation of power and energy systems and associated electrical apparatus via the utilization of power hardware in the loop (PHIL)-based strategies. PHIL is a powerful technique for testing and demonstration of systems in a rigorous and dynamic manner that is not achievable with other methodologies; however, it must only be conducted with foreknowledge of the technique and its challenges in order to realize its significant benefits. This paper reports on the state of the art in PHIL and its challenges and presents sample case studies illustrating its impact. Chris S. Edrington, Michael Steurer, James Langston, Touria El Mezyani, Karl Schoder |
Proc. IEEE | 5 |
| 2013 | Commissioning of MW-scale Power Hardware-in-the-Loop interfaces for experiments with AC/DC ConvertersabstractThis paper discusses the potential role Power Hardware-in-the-Loop (PHIL) testing can play in both actual testing and derisking laboratory experiments, and shows results obtained while preparing for MW-scale testing of new AC-DC converter technology. The step-by-step approach taken by moving through phases of modeling and simulation to PHIL experiments is described, and the real time simulation for the PHIL testing including Rest-of-System and setup of experiments is addressed. An AC/DC rectifier was successfully operated in PHIL up to several hundred kilowatt to derisk planned experiments for upcoming performance testing of AC/DC converters. The PHIL experiments used in this way are a crucial part in the commissioning process and allow confidence to be gained in proper setups before the actual converter becomes available for testing. Karl Schoder, James Langston, Michael Steurer |
IECON | 1 |
| 2012 | Power hardware-in-the-loop testing of a 500 kW photovoltaic array inverterabstractThe testing of a 500 kW photovoltaic array inverter using power hardware-in-the-loop simulation is described. A real-time simulator is used with a DC amplifier in order to emulate a photovoltaic (PV) array and an AC amplifier to emulate a power grid. The test setup is described in detail and a range of tests that were conducted on the inverter are summarized. James Langston, Karl Schoder, Michael Steurer, M. Omar Faruque, John Hauer, Ferenc Bogdan, Richard Bravo, Barry Mather, Farid Katiraei |
IECON | 2 |