Demo Data from EDBT 2026 / reviewers in the wild / expert
Reuven Kitai
dblp:173/3874
· DBLP profile ↗
3ranked-venue papers
1as first author
0since 2021 · last 1972
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Integrated circuit design · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › digital circuit design
arithmetic circuit design |
0.0 | 2 | 1971 | A Cellular Array for the Nonrestoring Extraction of Square Roots · IEEE Trans. Computers 1971 An Iterative Array for Multiplication of Signed Binary Numbers · IEEE Trans. Computers 1971 |
Integrated circuit design
digital circuit design |
0.0 | 2 | 1971 | A Cellular Array for the Nonrestoring Extraction of Square Roots · IEEE Trans. Computers 1971 An Iterative Array for Multiplication of Signed Binary Numbers · IEEE Trans. Computers 1971 |
Integrated circuit design › VLSI design
cellular array |
0.0 | 1 | 1971 | A Cellular Array for the Nonrestoring Extraction of Square Roots · IEEE Trans. Computers 1971 |
Integrated circuit design › digital arithmetic circuits
signed binary multiplication |
0.0 | 1 | 1971 | An Iterative Array for Multiplication of Signed Binary Numbers · IEEE Trans. Computers 1971 |
Methods — techniques the papers use, named apart from their topics
two's complement · 0.0controlled adder-subtractor cell · 0.0adder-subtractor cell · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1972 | Comments on "A Simplified Definition of Walsh Functions"abstractIn the above note,1a method is presented for forming a Walsh function, wal(n,θ), where n is the order and θ is the normalized time. A binary representation of n is converted to a Gray code, after which the Rademacher functions corresponding to the ONE bits in the Gray code are multiplied to synthesize a Walsh function. A simple extension of this method allows evaluation of any arbitrary point on the nth Walsh function without listing tables of Rademacher functions R(m,θ). Reuven Kitai, Karl-Hans Siemens |
IEEE Trans. Computers | 1 |
| 1971 | An Iterative Array for Multiplication of Signed Binary NumbersabstractAn iterative array for multiplication of signed binary numbers is described. It uses controlled adder-subtractor cells. The negative numbers are in two's complement form and the product, if negative, is also available in this form without requiring any additional operations. Jayanti C. Majithia, Reuven Kitai |
IEEE Trans. Computers | 2 |
| 1971 | A Cellular Array for the Nonrestoring Extraction of Square RootsabstractAn alternative cellular array design is described for nonrestoring extraction of square roots. The array uses a single type of adder/ subtractor cell with a near-iterative connection pattern. Jayanti C. Majithia, Reuven Kitai |
IEEE Trans. Computers | 2 |