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Xiling Yin

dblp:173/9307 · DBLP profile ↗
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4ranked-venue papers
0as first author
0since 2021 · last 2017
0000-0002-1330-8202ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3Software engineering, systems software and programming languages · 1Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware accelerators and domain-specific architectures · 46% Emerging computing paradigms · 23% Memory systems · 23%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware accelerators and domain-specific architectures
machine learning accelerator
0.212016
Switched by input: power efficient structure for RRAM-based convolutional neural network · DAC 2016
Emerging computing paradigms
neuromorphic computing
0.212016
Switched by input: power efficient structure for RRAM-based convolutional neural network · DAC 2016
Hardware accelerators and domain-specific architectures › machine learning accelerator › CNN accelerator
RRAM-based CNN accelerator
0.212016
Switched by input: power efficient structure for RRAM-based convolutional neural network · DAC 2016
Memory systems › emerging memory technologies
RRAM crossbar
0.212016
Switched by input: power efficient structure for RRAM-based convolutional neural network · DAC 2016
Energy-efficient computing › energy-efficient architecture
energy-efficient accelerator
0.112016
Switched by input: power efficient structure for RRAM-based convolutional neural network · DAC 2016

Methods — techniques the papers use, named apart from their topics

quantization · 0.2analog-to-digital converter elimination · 0.2
YearPublicationVenuePosition
2017 Computation-oriented fault-tolerance schemes for RRAM computing systems
abstract
The emerging metal-oxide resistive switching random-access memory (RRAM) devices and RRAM crossbar arrays have demonstrated their potential in enormously boosting the speed and energy-efficiency of analog matrix-vector multiplication. Unfortunately, due to the immature fabrication technology, commonly occurring Stuck-At-Faults (SAFs) seriously degrade the computational accuracy of RRAM crossbar based Computing System (RCS). In this paper, we propose a Mapping Algorithm with inner fault-tolerant ability (MAO) to convert matrix parameters into RRAM conductances in RCS by providing larger mapping space and fully exploring the available mapping space. Furthermore, we present two computation-oriented redundancy schemes — ‘Redundant Crossbars’ (RX) and ‘Independent Redundant Columns’ (IRC) to alleviate the loss of computational accuracy due to SAFs. RX adds redundant RRAM crossbar arrays and IRC introduces independent redundant RRAM columns to compensate the computational errors brought by SAFs.
Wenqin Huangfu, Lixue Xia, Xiling Yin, Tianqi Tang 0001, Boxun Li, Krishnendu Chakrabarty, Yuan Xie 0001, Yu Wang 0002, Huazhong Yang
ASP-DAC4
2016 Switched by input: power efficient structure for RRAM-based convolutional neural network
abstract
Convolutional Neural Network (CNN) is a powerful technique widely used in computer vision area, which also demands much more computations and memory resources than traditional solutions. The emerging metal-oxide resistive random-access memory (RRAM) and RRAM crossbar have shown great potential on neuromorphic applications with high energy efficiency. However, the interfaces between analog RRAM crossbars and digital peripheral functions, namely Analog-to-Digital Converters (ADCs) and Digital-to-Analog Converters (DACs), consume most of the area and energy of RRAM-based CNN design due to the large amount of intermediate data in CNN. In this paper, we propose an energy efficient structure for RRAM-based CNN. Based on the analysis of data distribution, a quantization method is proposed to transfer the intermediate data into 1 bit and eliminate DACs. An energy efficient structure using input data as selection signals is proposed to reduce the ADC cost for merging results of multiple crossbars. The experimental results show that the proposed method and structure can save 80% area and more than 95% energy while maintaining the same or comparable classification accuracy of CNN on MNIST.
Lixue Xia, Tianqi Tang 0001, Wenqin Huangfu, Xiling Yin, Boxun Li, Yu Wang 0002, Huazhong Yang
DAC5
2016 MNSIM: Simulation platform for memristor-based neuromorphic computing system
Lixue Xia, Boxun Li, Tianqi Tang 0001, Peng Gu 0008, Xiling Yin, Wenqin Huangfu, Pai-Yu Chen, Shimeng Yu, Yu Cao 0001, Yu Wang 0002, Yuan Xie 0001, Huazhong Yang
DATE5
2016 Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication
Lixue Xia, Peng Gu 0008, Boxun Li, Tianqi Tang 0001, Xiling Yin, Wenqin Huangfu, Shimeng Yu, Yu Cao 0001, Yu Wang 0002, Huazhong Yang
J. Comput. Sci. Technol.5