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Chase McCloskey

dblp:175/6207 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2016
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware reliability and fault tolerance · 83% Reconfigurable computing and FPGAs · 17%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware reliability and fault tolerance › radiation effects
radiation-induced faults
0.212016
SEU Mitigation and Validation of the LEON3 Soft Processor Using Triple Modular Redundancy for Space Processing · FPGA 2016
Hardware reliability and fault tolerance › soft errors
single-event upset
0.212016
SEU Mitigation and Validation of the LEON3 Soft Processor Using Triple Modular Redundancy for Space Processing · FPGA 2016
Hardware reliability and fault tolerance › redundancy › modular redundancy
triple modular redundancy
0.212016
SEU Mitigation and Validation of the LEON3 Soft Processor Using Triple Modular Redundancy for Space Processing · FPGA 2016
Reconfigurable computing and FPGAs › FPGA-based processor implementation
soft-core processor
0.112016
SEU Mitigation and Validation of the LEON3 Soft Processor Using Triple Modular Redundancy for Space Processing · FPGA 2016
Reconfigurable computing and FPGAs › FPGA architecture
SRAM-based FPGA
0.112016
SEU Mitigation and Validation of the LEON3 Soft Processor Using Triple Modular Redundancy for Space Processing · FPGA 2016

Methods — techniques the papers use, named apart from their topics

orbit failure rate estimation · 0.2heavy ion radiation testing · 0.2fault injection · 0.2
YearPublicationVenuePosition
2016 SEU Mitigation and Validation of the LEON3 Soft Processor Using Triple Modular Redundancy for Space Processing
abstract
Processors are an essential component in most satellite payload electronics and handle a variety of functions including command handling and data processing. There is growing interest in implementing soft processors on commercial FPGAs within satellites. Commercial FPGAs offer reconfigurability, large logic density, and I/O bandwidth; however, they are sensitive to ionizing radiation and systems developed for space must implement single-event upset mitigation to operate reliably. This paper investigates the improvements in reliability of a LEON3 soft processor operating on a SRAM-based FPGA when using triple-modular redundancy and other processor-specific mitigation techniques. The improvements in reliability provided by these techniques are validated with both fault injection and heavy ion radiation tests. The fault injection experiments indicate an improvement of 51× and the radiation testing results demonstrate an average improvement of 10×. Orbit failure rate estimations were computed and suggest that the TMR LEON3 processor has a mean-time to failure of over 76 years in a geosynchronous orbit.
Michael J. Wirthlin, Andrew M. Keller, Chase McCloskey, Parker Ridd, David S. Lee, Jeffrey T. Draper
FPGA3