Demo Data from EDBT 2026 / reviewers in the wild / expert
Ronak Kogta
dblp:175/6258
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 2016
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
high-level synthesis |
0.2 | 1 | 2016 | Re-targeting Optimization Sequences from Scalar Processors to FPGAs in HLS compilers (Abstract Only) · FPGA 2016 |
Compilers and program optimization › compiler optimization
optimization phase ordering |
0.1 | 1 | 2016 | Re-targeting Optimization Sequences from Scalar Processors to FPGAs in HLS compilers (Abstract Only) · FPGA 2016 |
Methods — techniques the papers use, named apart from their topics
heuristic search · 0.5downsampled sequence set · 0.5
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2016 | Re-targeting Optimization Sequences from Scalar Processors to FPGAs in HLS compilers (Abstract Only)abstractA high-level synthesis compiler translates a source program written in a high level programming language such as C or SystemC into an equivalent circuit. The performance of the generated circuit in terms of metrics such as area, frequency and clock cycles depends on the compiler optimizations enabled and their order of application. Finding an optimal sequence for a given program is a hard combinatorial optimization problem. In this paper, we propose a practical and search time efficient technique for finding a near-optimal sequence for a given program. The main idea is to strike a balance between the search for a universally good sequence (like that of O3) which works for all programs vis-a-vis finding a good sequence on a per-program basis. Towards that, we construct a rich downsampled sequence set, which caters to different program classes, from the unbounded optimization sequence space by applying heuristic search algorithms on a set of Microkernel benchmark programs. The optimization metric that we use while constructing the downsampled sequence set is the execution time on a scalar processor. Given a new program, we try all the sequences from the downsampled sequence setand pick the best. Applying this technique in the LegUp high-level synthesis compiler, we are able to obtain 23% and 40% improvement on CHStone and Machsuite benchmark programs respectively. We also propose techniques to further reduce the size of the downsampled sequence set to improve the sequence search time. Ronak Kogta, Suresh Purini, Ajit Mathew |
FPGA | 1 |