As Artificial Intelligence is being deployed more and more on edge devices, i.e. embedded systems, this begs the question: can these algorithms deal with the (transient) hardware errors known to happen on these devices? This demo answers this question by performing fault injection on an auto-encoder algorithm executing on a typical edge device. We demonstrate that these types of algorithms are still susceptible to the effects of transient hardware errors but that traditional software-implemented fault tolerance techniques remain effective in helping them mitigate their impact.

While the current machine fault diagnosis is affected by the rarity of cross conditional fault data in practice, efficient implementation of these diagnosis models on resource constrained devices is another active challenge. Given such constraints, an ideal fault diagnosis model should not be either generalizable across the shifting domains or lightweight, but rather a combination of both, generalizable while being minimalistic. Preferably being uninformed about the domain shift. Addressing these computational and data centric challenges, we propose a novel methodology, Convolutional Auto-encoder and Nearest Neighbors based self adaptation (SCAE-NN), that adapts its fault diagnosis model to the changing conditions of a machine. We implemented SCAE-NN for various cross-domain fault diagnosis tasks and compared its performance against the state-of-the-art domain invariant models. Compared to the SOTA, SCAE-NN is at least 6− 7% better at predicting fault classes across conditions, while being more than 10 times smaller in size and latency. Moreover, SCAE-NN does not need any labelled target domain data for the adaptation, making it suitable for practical data scarce scenarios.

Bluetooth Low Energy is a wireless communication protocol widely used in Internet of Things systems. As a popular protocol operating in the 2.4 GHz frequency band, it is constantly confronted with interference challenges. For instance, in a Bluetooth Low Energy network, all connections see each other as a source of interference. In this paper, the interference and reliability issues are investigated among Bluetooth Low Energy connections. The impact of various factors on the interference, such as connection parameters and network size, is shown through simulation. The trade-off between application level throughput, i.e. goodput, and reliability in a Bluetooth Low Energy network is described, which can be used in the design or deployment of Bluetooth Low Energy devices or networks.

Bluetooth Low Energy is one of the most popular wireless protocols in the 2.4 GHz frequency band nowadays. There have been multiple studies investigating its performance under interference. However, these studies mostly follow some commonly adopted assumptions. For instance, the location of the interference source does not vary the performance metrics of the connection; the data exchange scheme does not impact the performance metrics of the connection; the performance metrics are the same on both sides of a Bluetooth Low Energy connection. Unfortunately these assumptions are never validated. As a result, this paper aims to verify/challenge these commonly adopted assumptions through experiments. According to the experiment results, the impact of the device role in the BLE connection, the data exchange scheme within the BLE connection, and the location of the interference source is investigated and discussed. This paper should be considered as a cornerstone for other research related to Bluetooth Low Energy performance under interference. It can also be used as a preliminary guideline when deploying Bluetooth Low Energy communication in an interference environment.

We noted that communication performance of a Bluetooth Low Energy (BLE) connection is heavily affected by the radio interference from other connections or networks. Reliability is becoming a key requirement in BLE for its use in various Internet of Things applications. Hence, there is a widely recognized need for an in-depth study to reveal the parameters impacting BLE reliability under such radio interference. In this article, we investigate how transmission parameters, e.g., number of packets and packet transmission time, influence reliability of the BLE protocol. Specifically, a mathematical model is presented to explore the impact of the transmission parameters on the reliability of a BLE pair under interference caused by other pairs. This mathematical model is able to show the reliability issues from both the side of the BLE connection under interference and the side of the interference itself. The model is validated and novel insights on the common usage of BLE parameters by a wide range of experimental evaluations are provided. Experimental results highlight the correctness of the mathematical model, thus quantify the interplay between transmission parameters and coexistence, also the influence of other related parameters. This research provides a design-level or system-level insight in BLE usage and deployment.

Higher component density, lower voltage levels, and higher transistor counts increase programmable systems' susceptibility to transient faults. At the same time, the adoption of embedded systems in many safety-critical and mission-critical systems makes their reliability of utmost importance. Software-implemented error detection techniques can be utilized to protect these systems as an alternative to less flexible and costlier hardware solutions like redundant hardware or fully duplicated systems. One of these techniques is the low-level re-execution-based technique called DETECTOR, which matches the error reduction capabilities of other state-of-the-art techniques while utilizing only three reserved CPU registers. This is in contrast to other techniques, which required a large number of CPU registers to be reserved, making them unusable for some programs. This article provides an optimization of DETECTOR by combining parity checking with DETECTOR's re-execution mechanism. The technique, called P-DETECTOR, is validated extensively on multiple data processing and I/O-driven case studies and compared to the state-of-the-art. The results show that, compared to an unprotected system, the P-DETECTOR technique reduces the percentage of faults resulting in a corrupted output by 93.76% for control flow errors and by 87.89% for data flow errors, outperforming DETECTOR and matching other state-of-the-art techniques like RACFED, SWIFT, and FDSC.

Today's industry is rapidly evolving towards Industry 4.0 in which the Internet of Things is transforming machines into highly-interactive cyber-physical systems. At its core, these cyber-physical systems are driven by industrial embedded systems. However, the trend of many interacting systems creates a harsher working environment for these embedded systems to operate in, considering among other things electromagnetic interference. This working environment can introduce bit flips in the embedded system's hardware which cause control flow and data flow errors in its control software. This paper analyzes the effects of such control flow errors on an Industry 4.0 setup. We also apply a software implemented control flow error detection method to determine its gain in reliability. Finally, this paper demonstrates a basic but effective automated recovery method for our Industry 4.0 setup.

Embedded systems used in harsh environments are susceptible to bit-flips, which can cause data flow errors. In order to increase the reliability of embedded systems, numerous data flow error detection techniques have already been developed. It is, however, difficult to identify the best technique to apply, due to differences in the way they are evaluated in current literature.

This paper presents a new software-implemented data error detection technique called Full Duplication and Selective Comparison. Our technique combines the ideas of existing techniques in order to increase the fault detection ratio, decrease the imposed code size and execution time overhead. As the name gives away, we opt to duplicate the entire code base and place comparison instructions in critical basic blocks only. The critical basic blocks are the blocks with two or more incoming edges. We evaluate our technique by implementing it for several case studies and by performing fault injection experiments. Next, we compared the obtained results to the parameters of three established techniques: Error Detection by Diverse Data and Duplicated Instructions, Critical Block Duplication and Software Implemented Fault Tolerance. The results show an average increase of 20.5% in fault detection ratio and an average decrease in code size and execution time overhead of 12.6% and 0.5%, respectively.

Due to harsher working environments, soft errors or erroneous bit-flips occur more frequently in microcontrollers during execution. Without mitigation, such errors result in data corruption and control flow errors. Multiple software-implemented mitigation techniques have already been proposed. In this paper, we evaluate seven signature monitoring techniques in seven different test cases. We measure and compare their detection ratios, execution time overhead, and code size overhead. From the gathered results, we derive five requirements to develop an optimal signature monitoring technique. Based on these requirements, we propose a new signature monitoring technique called random additive signature monitoring (RASM). RASM uses signature updates with random values and optimally placed validity checks to detect interblock control flow errors. RASM has a higher detection ratio, lower execution time overhead, and lower code size overhead than the studied techniques.