H. C. Toorng

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dblp:177/1214 · DBLP profile ↗

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1ranked-venue papers

0as first author

0since 2021 · last 1973

—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems

1 paper

Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

Topic	Papers	Last	Evidence papers
Electronic design automation › logic synthesis finite state machine synthesis	1	1973	Algorithms for Multiple Shift Register Realizations of Sequential Machines · IEEE Trans. Computers 1973
Electronic design automation logic synthesis	1	1973	Algorithms for Multiple Shift Register Realizations of Sequential Machines · IEEE Trans. Computers 1973
Electronic design automation › logic synthesis › sequential circuit synthesis shift-register realization	1	1973	Algorithms for Multiple Shift Register Realizations of Sequential Machines · IEEE Trans. Computers 1973

Year	Publication	Venue	Position
1973	Algorithms for Multiple Shift Register Realizations of Sequential Machines abstract This paper considers the problem of realizing synchronous sequential machines with shift registers. The problem is approached in two steps. William D. Roome, H. C. Toorng	IEEE Trans. Computers	2