Demo Data from EDBT 2026 / reviewers in the wild / expert
Thomas F. Storey
dblp:177/1237
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1973
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 38% Hardware reliability and fault tolerance · 38% Integrated circuit design · 12% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware reliability and fault tolerance › fault-tolerant architecture
fault-tolerant processor design |
0.0 | 1 | 1973 | Design of a Self-Checking Microprogram Control · IEEE Trans. Computers 1973 |
Processor architecture and microarchitecture › microprogramming
microprogrammed control |
0.0 | 1 | 1973 | Design of a Self-Checking Microprogram Control · IEEE Trans. Computers 1973 |
Electronic design automation › hardware verification and test › fault modeling
fault model analysis |
0.0 | 1 | 1973 | Design of a Self-Checking Microprogram Control · IEEE Trans. Computers 1973 |
Integrated circuit design
large-scale integration |
0.0 | 1 | 1973 | Design of a Self-Checking Microprogram Control · IEEE Trans. Computers 1973 |
Methods — techniques the papers use, named apart from their topics
self-checking logic design · 0.0fault analysis · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1973 | Design of a Self-Checking Microprogram ControlabstractIn designing a self-checking processor, it is essential to recognize the types of failures that are most probable. Matching the checking techniques with the type of faults that are expected to occur should yield the best result with the least amount of hardware. The microprogram control will consist of integrated circuits: large-scale integration (LSI) for the memory and small-scale integration (SSI) for the associated control logic. Because of the density of chips on a plug-in package and the physical proximity of the devices on an integrated circuit, multiple faults within a single circuit are highly probable. The types of faults within a circuit have been analyzed and found to be of the type which would tend to affect the bits in a unidirectional manner. Also the failed bits would probably be adjacent rather than randomly dispersed throughout-the microprogram store word. Robert W. Cook, William H. Sisson, Thomas F. Storey, Wing N. Toy |
IEEE Trans. Computers | 3 |