Demo Data from EDBT 2026 / reviewers in the wild / expert
Parveen K. Gupta
dblp:177/1241
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1973
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 67% Integrated circuit design · 33% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › logic synthesis › finite state machine synthesis
incompletely specified sequential machine |
0.0 | 1 | 1973 | Fast State Minimization of Incompletely Specified Sequential Machines · IEEE Trans. Computers 1973 |
Integrated circuit design › digital circuit design
sequential circuit design |
0.0 | 1 | 1973 | Fast State Minimization of Incompletely Specified Sequential Machines · IEEE Trans. Computers 1973 |
Electronic design automation › logic synthesis › logic optimization
state minimization |
0.0 | 1 | 1973 | Fast State Minimization of Incompletely Specified Sequential Machines · IEEE Trans. Computers 1973 |
Methods — techniques the papers use, named apart from their topics
state cover computation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1973 | Fast State Minimization of Incompletely Specified Sequential MachinesabstractExisting techniques for finding minimum state covers of an incompletely specified sequential machine are streamlined to yield a single minimum cover with significantly less computation. The factor by which computation is reduced is directly proportional to the complexity of the machine. Parveen K. Gupta, Donald L. Dietmeyer |
IEEE Trans. Computers | 1 |