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J. Egil Juliussen

dblp:177/1247 · also Egil Juliussen · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1973
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Performance modeling and evaluation · 62% Memory systems · 19% Processor architecture and microarchitecture · 19%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Performance modeling and evaluation › performance evaluation methodology
simulation and benchmarking
0.011973
Multiple Microprocessors with Common Main and Control Memories · IEEE Trans. Computers 1973
Processor architecture and microarchitecture
microprocessor
0.011973
Multiple Microprocessors with Common Main and Control Memories · IEEE Trans. Computers 1973
Memory systems
shared memory
0.011973
Multiple Microprocessors with Common Main and Control Memories · IEEE Trans. Computers 1973

Methods — techniques the papers use, named apart from their topics

simulation · 0.0
YearPublicationVenuePosition
1973 Multiple Microprocessors with Common Main and Control Memories
abstract
This paper investigates some of the problems that arise when several microprocessors share a common control memory and a common main memory. The performance with respect to both control and main memory accessing conflicts is measured for several system configurations by means of a simulation program. The program tests a set of Digital Scientific Meta 4's operating in IBM 1130 emulation mode.
J. Egil Juliussen, Frederic J. Mowle
IEEE Trans. Computers1