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Alex Markuze

dblp:177/8588 · DBLP profile ↗
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4ranked-venue papers
3as first author
1since 2021 · last 2021
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 3 first-author · 1 since 2021Software engineering, systems software and programming languages · 3 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
3 papers
Hardware security and side channels · 53% Systems and software security · 47%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 100%
Software engineering, system software, and programming languages
2 papers
Operating systems · 100%
Computer networks
1 paper
Internet architecture and protocols · 100%

Topics — the 5 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware security and side channels › hardware attacks
DMA attacks
0.512021
Characterizing, exploiting, and detecting DMA code injection vulnerabilities in the presence of an IOMMU · EuroSys 2021
Memory systems
direct memory access
0.412020
IOctopus: Outsmarting Nonuniform DMA · ASPLOS 2020
Memory systems
non-uniform memory access
0.412020
IOctopus: Outsmarting Nonuniform DMA · ASPLOS 2020
Internet architecture and protocols › network architecture design › layered architecture › protocol layering › network stack
network stack optimization
0.312018
DAMN: Overhead-Free IOMMU Protection for Networking · ASPLOS 2018
Hardware security and side channels
trusted execution environments
0.112021
Characterizing, exploiting, and detecting DMA code injection vulnerabilities in the presence of an IOMMU · EuroSys 2021

Methods — techniques the papers use, named apart from their topics

DMA-aware memory allocation · 1.0shadow DMA buffers · 0.5copy-based protection · 0.5DMA code injection detection · 0.5
YearPublicationVenuePosition
2021 Characterizing, exploiting, and detecting DMA code injection vulnerabilities in the presence of an IOMMU
abstract
Direct memory access (DMA) renders a system vulnerable to DMA attacks, in which I/O devices access memory regions not intended for their use. Hardware input-output memory management units (IOMMU) can be used to provide protection. However, an IOMMU cannot prevent all DMA attacks because it only restricts DMA at page-level granularity, leading to sub-page vulnerabilities.
Alex Markuze, Shay Vargaftik, Gil Kupfer, Boris Pismenny, Nadav Amit, Adam Morrison 0001, Dan Tsafrir
EuroSys1
2020 IOctopus: Outsmarting Nonuniform DMA
abstract
In a multi-CPU server, memory modules are local to the CPU to which they are connected, forming a nonuniform memory access (NUMA) architecture. Because non-local accesses are slower than local accesses, the NUMA architecture might degrade application performance. Similar slowdowns occur when an I/O device issues nonuniform DMA (NUDMA) operations, as the device is connected to memory via a single CPU. NUDMA effects therefore degrade application performance similarly to NUMA effects.
Igor Smolyar, Alex Markuze, Boris Pismenny, Haggai Eran, Gerd Zellweger, Austin Bolen, Liran Liss, Adam Morrison 0001, Dan Tsafrir
ASPLOS2
2018 DAMN: Overhead-Free IOMMU Protection for Networking
abstract
DMA operations can access memory buffers only if they are "mapped" in the IOMMU, so operating systems protect themselves against malicious/errant network DMAs by mapping and unmapping each packet immediately before/after it is DMAed. This approach was recently found to be riskier and less performant than keeping packets non-DMAable and instead copying their content to/from permanently-mapped buffers. Still, the extra copy hampers performance of multi-gigabit networking. We observe that achieving protection at the DMA (un)map boundary is needlessly constraining, as devices must be prevented from changing the data only after the kernel reads it. So there is no real need to switch ownership of buffers between kernel and device at the DMA (un)mapping layer, as opposed to the approach taken by all existing IOMMU protection schemes. We thus eliminate the extra copy by (1)~implementing a new allocator called DMA-Aware Malloc for Networking (DAMN), which (de)allocates packet buffers from a memory pool permanently mapped in the IOMMU; (2)~modifying the network stack to use this allocator; and (3)~copying packet data only when the kernel needs it, which usually morphs the aforementioned extra copy into the kernel's standard copy operation performed at the user-kernel boundary. DAMN thus provides full IOMMU protection with performance comparable to that of an unprotected system.
Alex Markuze, Igor Smolyar, Adam Morrison 0001, Dan Tsafrir
ASPLOS1
2016 True IOMMU Protection from DMA Attacks: When Copy is Faster than Zero Copy
abstract
Malicious I/O devices might compromise the OS using DMAs. The OS therefore utilizes the IOMMU to map and unmap every target buffer right before and after its DMA is processed, thereby restricting DMAs to their designated locations. This usage model, however, is not truly secure for two reasons: (1) it provides protection at page granularity only, whereas DMA buffers can reside on the same page as other data; and (2) it delays DMA buffer unmaps due to performance considerations, creating a vulnerability window in which devices can access in-use memory. We propose that OSes utilize the IOMMU differently, in a manner that eliminates these two flaws. Our new usage model restricts device access to a set of shadow DMA buffers that are never unmapped, and it copies DMAed data to/from these buffers, thus providing sub-page protection while eliminating the aforementioned vulnerability window. Our key insight is that the cost of interacting with, and synchronizing access to the slow IOMMU hardware---required for zero-copy protection against devices---make copying preferable to zero-copying.
Alex Markuze, Adam Morrison 0001, Dan Tsafrir
ASPLOS1