EDBT 2026 Demo / reviewers in the wild / expert
Burton K. Smith
dblp:178/3814
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1971
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 100% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture › microprogramming
microprogrammed processor design |
0.0 | 1 | 1971 | Functional Characteristics of a Multilingual Processor · IEEE Trans. Computers 1971 |
Compilers and program optimization › compiler-hardware co-design
instruction set design |
0.0 | 1 | 1971 | Functional Characteristics of a Multilingual Processor · IEEE Trans. Computers 1971 |
Methods — techniques the papers use, named apart from their topics
microprogramming · 0.0emulation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1971 | Functional Characteristics of a Multilingual ProcessorabstractThis paper describes the functional characteristics of the Standard Computer MLP-900 processor. This microprogrammable processor is designed for general-purpose emulation of a wide variety of known processors as well as being adaptable to new general-purpose and special-purpose applications. Two approaches to the design of microprogrammed processors, namely minimally encoded and highly encoded, are considered. The significant architectural properties that provide the multilingual capability are discussed. A target language-execution strategy for the MLP-900 is presented followed by a problem-oriented target instruction set which provides for packed field operations. Finally, some projected uses of the processor are considered. Harold W. Lawson, Burton K. Smith |
IEEE Trans. Computers | 2 |