Demo Data from EDBT 2026 / reviewers in the wild / expert
J. M. Daniel
dblp:178/3833
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1971
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Embedded and real-time systems · 77% Parallel and multicore computing · 23% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Embedded and real-time systems › real-time scheduling › priority scheduling
dynamic priority scheduling |
0.0 | 1 | 1971 | Dynamic Resolution of Memory Access Conflicts · IEEE Trans. Computers 1971 |
Parallel and multicore computing › multiprocessor system
shared-memory multiprocessor |
0.0 | 1 | 1971 | Dynamic Resolution of Memory Access Conflicts · IEEE Trans. Computers 1971 |
Methods — techniques the papers use, named apart from their topics
dynamic priority assignment · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1971 | Dynamic Resolution of Memory Access ConflictsabstractThis note presents a method for designing and implementing a dynamic priority assignment memory-access conflict-resolution circuit for use in multiprocessing systems with K processors. A decision rule which establishes the priority, assignment is given and an example which illustrates the techniques is also discussed. J. M. Daniel, J. David Irwin |
IEEE Trans. Computers | 1 |