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V. Michael Griswold

dblp:178/3878 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1971
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 67% Integrated circuit design · 33%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › logic synthesis
boolean function realization		 0.011971
Large-Scale Circuit Interconnection for Boolean Function Implementation · IEEE Trans. Computers 1971
Integrated circuit design
digital circuit design		 0.011971
Large-Scale Circuit Interconnection for Boolean Function Implementation · IEEE Trans. Computers 1971
Electronic design automation
logic synthesis		 0.011971
Large-Scale Circuit Interconnection for Boolean Function Implementation · IEEE Trans. Computers 1971

Methods — techniques the papers use, named apart from their topics

planar circuit design · 0.0gate minimization · 0.0
YearPublicationVenuePosition
1971 Large-Scale Circuit Interconnection for Boolean Function Implementation
abstract
The efficient production of LSI realizations of Boolean functions is studied and two interconnection procedures are presented. The first procedure is a modular method using planar circuits. The second procedure, which stresses a minimum number of gates, results in an "all purpose" chip which can be personalized externally by the customer.
V. Michael Griswold, Chester C. Carroll
 IEEE Trans. Computers1