Demo Data from EDBT 2026 / reviewers in the wild / expert
Louis J. Koczela
dblp:178/3968
· DBLP profile ↗
2ranked-venue papers
2as first author
0since 2021 · last 1971
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Processor architecture and microarchitecture · 46% Embedded and real-time systems · 30% Hardware reliability and fault tolerance · 23% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Embedded and real-time systems
real-time control |
0.0 | 1 | 1971 | A Three-Failure-Tolerant Computer System · IEEE Trans. Computers 1971 |
Processor architecture and microarchitecture › tiled architecture
cellular architecture |
0.0 | 1 | 1969 | The Design of a Highly Parallel Computer Organization · IEEE Trans. Computers 1969 |
Hardware reliability and fault tolerance
fault-tolerant architecture |
0.0 | 1 | 1969 | The Design of a Highly Parallel Computer Organization · IEEE Trans. Computers 1969 |
Processor architecture and microarchitecture
parallel computer organization |
0.0 | 1 | 1969 | The Design of a Highly Parallel Computer Organization · IEEE Trans. Computers 1969 |
Methods — techniques the papers use, named apart from their topics
adaptive majority voting · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1971 | A Three-Failure-Tolerant Computer SystemabstractTwo basic factors influence the design of highly reliable computer systems: the amount of failures required to be tolerated and the reliability or MTBF required. A computer system designed to tolerate any three single failures in a fail-operational–fail-operational–fail-safe manner for a real-time control application is presented. The design approach uses adaptive majority voting in both hardware and software with a four-level redundant system. Various methods of performing the adaptive majority voting functions were evaluated with the selected approach using a special module termed a voter–comparator switch (VCS). The VCS module allows the computer system to be operated in a variety of redundant modes, depending on the failure tolerance required at any particular time. Louis J. Koczela |
IEEE Trans. Computers | 1 |
| 1969 | The Design of a Highly Parallel Computer OrganizationabstractThe design of a computer organization is presented for general-purpose computing with a very high tolerance of failure while taking advantage of future large-scale integration techniques. A high degree of parallel computations may be executed. The organization distributes processing logic along with memory to form "cells." The architecture and operation of the cells are developed. Design aspects of the cells are presented along with software considerations of the organization. Louis J. Koczela, Gary Y. Wang |
IEEE Trans. Computers | 1 |