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John M. Thorington Jr.

dblp:178/4906 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1972
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 67% Performance modeling and evaluation · 33%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › virtual memory management
page replacement algorithms		 0.011972
An Adaptive Replacement Algorithm for Paged-Memory Computer Systems · IEEE Trans. Computers 1972
Performance modeling and evaluation
simulation		 0.011972
An Adaptive Replacement Algorithm for Paged-Memory Computer Systems · IEEE Trans. Computers 1972
Memory systems › memory management
virtual memory		 0.011972
An Adaptive Replacement Algorithm for Paged-Memory Computer Systems · IEEE Trans. Computers 1972

Methods — techniques the papers use, named apart from their topics

probability model · 0.0adaptive replacement · 0.0
YearPublicationVenuePosition
1972 An Adaptive Replacement Algorithm for Paged-Memory Computer Systems
abstract
A general class of adaptive replacement schemes for use in paged memories is developed. One such algorithm, called SIM, is simulated using a probability model that generates memory traces, and the results of the simulation of this adaptive scheme are compared with those obtained using the best nonlookahead algorithms. A technique for implementing this type of adaptive replacement algorithm with state of the art digital hardware is also presented.
John M. Thorington Jr., J. David Irwin
 IEEE Trans. Computers1