Demo Data from EDBT 2026 / reviewers in the wild / expert
John W. Myrna
dblp:178/6095
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1970
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 87% Parallel and multicore computing · 13% |
Topics — the 2 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture › tiled architecture
cellular architecture |
0.0 | 1 | 1970 | System Design of a Cellular APL Computer · IEEE Trans. Computers 1970 |
Processor architecture and microarchitecture
instruction set architecture |
0.0 | 1 | 1970 | System Design of a Cellular APL Computer · IEEE Trans. Computers 1970 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1970 | System Design of a Cellular APL ComputerabstractA system design is given for a computer capable of efficient execution of APL source statements and programs. The system is organized in a new type computer architecture based upon the storage of matrices and vectors in cellular logic arrays. Almost all of the scalar, mixed, and composite fixed point APL operations are implemented on the machine by algorithms given in this paper. The detailed logical design of the machine has not been completed; however, all the needed logic and memory has been specified. Also, the functions that each hardware cell must be able to perform have been specified. The algorithms for most APL operations are presented in flow charts or tables which give the detailed data flow produced by the execution of each APL operation in the machine. Kenneth J. Thurber, John W. Myrna |
IEEE Trans. Computers | 2 |