Demo Data from EDBT 2026 / reviewers in the wild / expert
Warren Y. Dere
dblp:178/6112
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1970
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Parallel and multicore computing · 44% Hardware accelerators and domain-specific architectures · 44% Integrated circuit design · 13% |
Topics — the 2 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Parallel and multicore computing
array processor |
0.0 | 1 | 1970 | Berkeley Array Processor · IEEE Trans. Computers 1970 |
Hardware accelerators and domain-specific architectures
signal processing accelerator |
0.0 | 1 | 1970 | Berkeley Array Processor · IEEE Trans. Computers 1970 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1970 | Berkeley Array ProcessorabstractThe Berkeley array processor is a special-purpose computer designed to perform the operations of correlation, convolution, recursive filtering, matrix multiplication, as well as a variant of the Cooley-Tukey algorithm, and others. This note describes the logical organization and performance of this device. Warren Y. Dere, David J. Sakrison |
IEEE Trans. Computers | 1 |