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George A. Works

dblp:178/6120 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1970
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware accelerators and domain-specific architectures · 50% Processor architecture and microarchitecture · 50%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware accelerators and domain-specific architectures › signal processing accelerator
FFT processor		 0.011970
A Pipeline Fast Fourier Transform · IEEE Trans. Computers 1970
Processor architecture and microarchitecture › computer arithmetic
pipelined arithmetic		 0.011970
A Pipeline Fast Fourier Transform · IEEE Trans. Computers 1970
Processor architecture and microarchitecture › pipelining
pipeline design		 0.011970
A Pipeline Fast Fourier Transform · IEEE Trans. Computers 1970
Hardware accelerators and domain-specific architectures
signal processing accelerator		 0.011970
A Pipeline Fast Fourier Transform · IEEE Trans. Computers 1970

Methods — techniques the papers use, named apart from their topics

sparse fourier transform · 0.0serial storage · 0.0
YearPublicationVenuePosition
1970 A Pipeline Fast Fourier Transform
abstract
This paper describes a novel structure for a hardwired fast Fourier transform (FFT) signal processor that promises to permit digital spectrum analysis to achieve throughput rates consistent with extremely wide-band radars. The technique is based on the use of serial storage for data and intermediate results and multiple arithmetic units each of which carries out a sparse Fourier transform. Details of the system are described for data sample sizes that are binary multiples, but the technique is applicable to any composite number.
Herbert L. Groginsky, George A. Works
 IEEE Trans. Computers2