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Yao Tung Yen

dblp:178/7365 · DBLP profile ↗
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3ranked-venue papers
3as first author
0since 2021 · last 1969
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 3 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Electronic design automation · 53% Integrated circuit design · 47%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test
fault detection
0.011969
Computer-Aided Test Generation for Four-Phase MOS LSI Circuits · IEEE Trans. Computers 1969
Electronic design automation
hardware verification and test
0.011969
Computer-Aided Test Generation for Four-Phase MOS LSI Circuits · IEEE Trans. Computers 1969
Electronic design automation › hardware verification and test
test generation
0.011969
Computer-Aided Test Generation for Four-Phase MOS LSI Circuits · IEEE Trans. Computers 1969
Integrated circuit design
digital circuit design
0.011968
Some Theoretical Properties of Multithreshold Realizable Functions · IEEE Trans. Computers 1968
Electronic design automation › hardware verification and test
logic simulation
0.011968
A Mathematical Model Characterizing Four-Phase MOS Circuits for Logic Simulation · IEEE Trans. Computers 1968
Integrated circuit design › digital circuit design
MOS circuits
0.011968
A Mathematical Model Characterizing Four-Phase MOS Circuits for Logic Simulation · IEEE Trans. Computers 1968
Integrated circuit design › digital circuit design › threshold logic
multithreshold threshold elements
0.011968
Some Theoretical Properties of Multithreshold Realizable Functions · IEEE Trans. Computers 1968
Integrated circuit design › digital circuit design
threshold logic
0.011968
Some Theoretical Properties of Multithreshold Realizable Functions · IEEE Trans. Computers 1968

Methods — techniques the papers use, named apart from their topics

mathematical models · 0.0
YearPublicationVenuePosition
1969 Computer-Aided Test Generation for Four-Phase MOS LSI Circuits
abstract
In this paper a practical approach to generate fault detection tests for four-phase MOS LSI circuits is discussed. Emphasis is given to a computer aid on the generation of both primary output and primary input test sequences. A technique to preset the circuit to predictable logic levels is presented.
Yao Tung Yen
IEEE Trans. Computers1
1968 A Mathematical Model Characterizing Four-Phase MOS Circuits for Logic Simulation
abstract
Abstract—Four-phase MOS circuits exhibit many peculiar features not observed in other families of logic circuits. In this paper, a mathematical model which characterizes the circuits is presented for logic simulation. It is shown that this model enables us to develop a computer program which can rapidly and efficiently verify and evaluate the logic design of the circuits.
Yao Tung Yen
IEEE Trans. Computers1
1968 Some Theoretical Properties of Multithreshold Realizable Functions
abstract
Abstract—In recent years, considerable attention has been focused on the problem of improving the logic implementation capability of logic elements in digital computer circuits. This paper investigates the theoretical properties of a logic element called the multithreshold threshold element. The concept of this logic element is a generalization of the concept of the single-threshold threshold element.
Yao Tung Yen
IEEE Trans. Computers1