Prabha Sundaravadivel

dblp:178/8191 · DBLP profile ↗
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4ranked-venue papers
1as first author
4since 2021 · last 2025
0000-0001-5045-2468ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 1 first-author · 4 since 2021
YearPublicationVenuePosition
2025 VisNAV: An Autonomous, Unified, Focus-assisted Navigation in UAVs for Agricultural Field Operations
Tamonash Bhattacharyya, Aryan Anand, Prabha Sundaravadivel, Henry A. Torbert
ACM Great Lakes Symposium on VLSI3
2025 Resistorless Grounded Memristor Emulator Using OTA-OTRA for low power edge computing
abstract
This paper presents a novel charge-controlled, resistorless memristor emulator configuration based on current-mode building blocks, specifically an Operational Transconductance Amplifier (OTA), an Operational Transresistance Amplifier (OTRA), and a grounded MOS capacitor. The proposed design focuses exclusively on grounded incremental and decremental memristor configurations. It eliminates the need for resistors, analog multipliers, or ADC/DAC components, simplifying the architecture and enhancing its integration potential. The emulator's memristance is electronically tunable through the bias voltage of the OTRA and is accurately modeled as a function of the input signal flux. Simulation results, using Cadence Virtuoso with 0.18 µm CMOS technology, confirm stable pinched hysteresis behavior up to 20 MHz. The design exhibits robust performance under various conditions, including temperature variations, process corners, and a range of capacitor values. The proposed configuration demonstrates low power consumption, measured at just 1.019 mW. Its non-volatile characteristics are validated through pulsed signal testing, confirming its suitability for memory-retaining applications. Also, experimental verification using commercially available ICs supports the simulation outcomes. This grounded memristor emulator offers a practical, energy-efficient, and scalable solution for integration into analog and neuromorphic systems.
Shekhar Suman Borah, Prabha Sundaravadivel, Krishna N. Reddy
ACM Great Lakes Symposium on VLSI2
2025 Multi-Parameter Comparative Study of Selective In-Memory Computing Processor Architectures for Performance Optimization in Accelerated Edge Computing
V. Mohith, Shekhar Suman Borah, Prabha Sundaravadivel, R. Sakthivel 0002
ACM Great Lakes Symposium on VLSI3
2022 IoT-enabled Soft Robotics for Electrical Engineers
abstract
In the field of technology and engineering education, there is a lot of uncertainty as to what the future trends are going to be. The institutions are preparing and training their students for jobs that they haven't even explored yet. To overcome this uncertainty, new domains with overlapping skill sets are constantly integrated to engage students with technological development for the future computing era. Robotics and the Internet of Things have been a popular area of interest amongst Electrical and Computer Engineers with high global value. Soft robots can be described as a form of biomimicry in which traditional hard robotics are replaced by a more sophisticated model that imitates human, animal, and plant life. In this article, we discuss a problem-based learning approach to integrate key concepts of soft robotics into the undergraduate electrical engineering curricula. The proposed module can be easily integrated into any IoT and Robotics curriculum.
Prabha Sundaravadivel, Prosenjit Kumar Ghosh, Bikal Suwal
ACM Great Lakes Symposium on VLSI1