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William D. Ryan

dblp:178/9300 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 1976
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 74% Integrated circuit design · 26%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
circuit simulation
0.011976
Improved Simulation of Pulse Propagation Between Digital Circuits · IEEE Trans. Computers 1976
Electronic design automation › signal integrity
pulse propagation
0.011976
Improved Simulation of Pulse Propagation Between Digital Circuits · IEEE Trans. Computers 1976
Electronic design automation
signal integrity
0.011976
Improved Simulation of Pulse Propagation Between Digital Circuits · IEEE Trans. Computers 1976
Integrated circuit design
digital circuit design
0.021976
A Delay Line and Logic Circuits Utilizing Charge-Storage Subharmonic Parametric Oscillators · IEEE Trans. Computers 1968
Improved Simulation of Pulse Propagation Between Digital Circuits · IEEE Trans. Computers 1976
Integrated circuit design
large-scale integration
0.011976
Improved Simulation of Pulse Propagation Between Digital Circuits · IEEE Trans. Computers 1976
Integrated circuit design › digital circuit design › logic design
logic circuits
0.011968
A Delay Line and Logic Circuits Utilizing Charge-Storage Subharmonic Parametric Oscillators · IEEE Trans. Computers 1968

Methods — techniques the papers use, named apart from their topics

inverse laplace transform · 0.0fast fourier transform · 0.0charge-storage subharmonic parametric oscillator · 0.0
YearPublicationVenuePosition
1976 Improved Simulation of Pulse Propagation Between Digital Circuits
abstract
An improved simulation of pulse propagation between integrated digital circuits is presented. Two novel improvements associated with the inverse Laplace transform used are presented; 1) the introduction of two-dimensional weight factors σn,mand 2) the use of a shifting parameter a. The algorithm proposed is very fast and saves considerably on computer memory. Fast Fourier transform (FFT) techniques are also employed. The computed results agree well with the experimental observations using TTL gates. The technique deals with arbitrary input waveforms, lossy lines, aperiodic tap-off loads, and is extended to large large-scale integrated (LSI) digital systems and crosstalk prediction.
N. B. Rabbat, S. Q. A. M. A. Hossain, William D. Ryan
IEEE Trans. Computers3
1968 A Delay Line and Logic Circuits Utilizing Charge-Storage Subharmonic Parametric Oscillators
abstract
Abstract—The charge-storage subharmonic parametric oscillator may be switched from one state to the other within one cycle of pump voltage. This property is used in the design and construction of a 6-element delay line. This delay line is shown to perform predictably when the elements are connected in a loop to give a self- switching arrangement.
Robert H. Mitchell, Thomas Williams, William D. Ryan
IEEE Trans. Computers3