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Qinggao Mei

dblp:179/0847 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 2016
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › thermal analysis
chip-level thermal analysis
0.212016
An Efficient Transient Electro-Thermal Simulation Framework for Power Integrated Circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2016
Electronic design automation
circuit simulation
0.212016
An Efficient Transient Electro-Thermal Simulation Framework for Power Integrated Circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2016
Electronic design automation
electrothermal simulation
0.212016
An Efficient Transient Electro-Thermal Simulation Framework for Power Integrated Circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2016

Methods — techniques the papers use, named apart from their topics

table models · 0.2nonlinear exponential integrator · 0.23-d field solver · 0.2
YearPublicationVenuePosition
2016 An Efficient Transient Electro-Thermal Simulation Framework for Power Integrated Circuits
abstract
This paper presents a new transient electro-thermal simulation method for fast 3-D chip-level analysis of power electronics with field solver accuracy. The metallization stack and substrate are meshed and solved with 3-D field solver using nonlinear temperature-dependent electrical and thermal parameters, and the active transistors are modeled with table models to avoid time-consuming technology computer-aided design simulation. Two contributions are made to enhance the physical relevance and the computational performance: 1) the capacitive effects, including interconnect parasitic capacitance and gate capacitance of power devices with nonlinear dependence on bias and temperature, are explicitly accounted for and 2) a specialized nonlinear exponential integrator (EI) method is developed to address the considerably different time scales between electrical and thermal sectors. The EI-based transient solver allows the electrical system to step with much larger time steps than in conventional methods, thus the time step gap between the electrical and the thermal simulation is largely reduced.
Qinggao Mei, Wim Schoenmaker, Shih-Hung Weng, Hao Zhuang 0001, Chung-Kuan Cheng, Quan Chen 0007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1