Mobile devices have become the most important devices in our life. However, they are limited in battery capacity. Therefore, low-power computing is crucial for their long lifetime. A spin-transfer torque RAM (STT-RAM) has become emerging memory technology because of its low leakage power consumption. We herein propose MH cache, a multi-retention STT-RAM-based cache management scheme for last-level caches (LLC) to reduce their power consumption for mobile hardware rendering systems. We analyzed the memory access patterns of processes and observed how rendering methods affect process behaviors. We propose a cache management scheme that measures write-intensity of each process dynamically and exploits it to manage a power-efficient multi-retention STT-RAM-based cache. Our proposed scheme uses variable threshold for a process’ write-intensity to determine cache line placement. We explain how to deal with the following issue to implement our proposed scheme. Our experimental results show that our techniques significantly reduce the LLC power consumption by 32% and 32.2% in single- and quad-core systems, respectively, compared to a full STT-RAM LLC.

Network errors such as packet losses consume large amounts of energy. We analyzed the reason for this through measurements using the latest smartphones and full-system simulation. We found that on packet losses the smartphones maintain high frequencies for CPU without doing useful work. To address this problem, we propose a method for reducing the energy consumption by lowering the performance level by exploiting a dynamic voltage and frequency scaling mechanism when long network delays are expected. According to our experiments, our method reduces the total energy consumption of web browsing on two different smartphones by up to 10.0% and 11.5%, respectively.

The analysis of energy consumption and performance is essential to design and optimize mobile systems because of their limited battery capacity. Full-system simulation provides detailed performance metrics for an entire system. Thus it has been widely used for designing and optimizing microarchitectures and mobile systems. The gem5 simulator provides full-system simulation based on the ARM architecture and Android for mobile systems. However, gem5 for mobile systems does not support wireless network interfaces and can not configure various networking environments such as network errors and network types. Furthermore, gem5 provides only performance statistics without power consumption data. This paper presents a mobile full-system simulation framework based on an enhanced gem5 that includes a simulated mobile system, a simulated server system, and a simulated Ethernet, which enables us to configure various networking environments, in addition to power models for the main components of mobile systems: CPU/caches, DRAM, network interfaces, and display. Using mobile applications and SPEC CPU2006 benchmarks, we show that the proposed mobile full-system simulator achieves performance accuracy within 26.8% error rate for various network packet loss rates, and power modeling accuracy within 12.8% error rate, compared with Nexus 5. This mobile full-system simulator considering the real networking environments provides the energy consumption and performance analysis of not only hardware components, but also application processes and threads at the same time. We also discovered energy-inefficient tasks and the inefficiency of the DVFS ondemand governor on network delays using the proposed mobile full-system simulation framework.