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Edwin H. Miller

dblp:179/4922 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1967
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Distributed systems · 67% Hardware reliability and fault tolerance · 33%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Distributed systems
fault tolerance
0.011967
Reliability Aspects of the Variable Instruction Computer · IEEE Trans. Electron. Comput. 1967
Distributed systems › fault tolerance › resilience
graceful degradation
0.011967
Reliability Aspects of the Variable Instruction Computer · IEEE Trans. Electron. Comput. 1967
Hardware reliability and fault tolerance › redundancy
hardware redundancy
0.011967
Reliability Aspects of the Variable Instruction Computer · IEEE Trans. Electron. Comput. 1967

Methods — techniques the papers use, named apart from their topics

error-checking circuits · 0.0MIL-HDBK-217 analysis · 0.0
YearPublicationVenuePosition
1967 Reliability Aspects of the Variable Instruction Computer
abstract
This paper is intended to show how the unique features of the Variable Instruction Computer (VIC) make it valuable for applications requiring high reliability. By careful choice of components, use of error-checking circuits, and selected application of redundant hardware, the basic unextended reliability of the VIC is comparable with the state-of-the-art. This is verified by a standard MIL-HDBK-217 type of analysis. The variable instruction technique is briefly described by use of a block diagram. The method for extending reliability by use of variable instructions is explained and an example is given. The concept of algorithm change to achieve controlled graceful degradation is discussed. An analysis of a typical application of this technique is given and extensions of the variable instruction concept to more advanced reliability requirements are discussed.
Edwin H. Miller
IEEE Trans. Electron. Comput.1