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Jin Wu 0004
dblp:18/1539-4
· DBLP profile ↗
5ranked-venue papers
1as first author
4since 2021 · last 2025
0000-0002-1833-3538ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 4 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | A broadband low-noise VCO circuit based on a hybrid analog-digital control loop
Lixia Zheng, Zilu Zhao, Hehe Tian, Jin Wu 0004, Weifeng Sun 0001 |
Integr. | 5 |
| 2025 | A SPAD Image Sensor With Main-Sub-TDC-Based Coincidence DetectionabstractLight detection and ranging (Lidar) is usually enabled by Single-Photon Avalanche Detector (SPAD) sensors which may be falsely triggered by ambient light. Coincidence detection can suppress the ambient light at the cost of the lateral resolution. A$64\times 64$SPAD image sensor with coincidence detection is proposed for Lidar. A main-sub time-to-digital converter (TDC), in which the main TDC is used for timestamping the coincidence window and the sub-TDC is used for timestamping the event within the coincidence window, is proposed to avoid the loss of the lateral resolution at a small power cost. A delay-locked loop (DLL) is adopted to generate an analog voltage for maintaining the length of the coincidence window against process-voltage-temperature (PVT) variations. A TDC code correction circuit is proposed to reduce the probability of TDC inter-segment errors to 0.7%. The SPAD image sensor is based on the 3D integration of a SPAD array with a ROIC. The ROIC chip is fabricated in a$0.18\mu $m CMOS process. Driven by a 250 MHz multi-phase clock and a 100 MHz data readout clock, the chip achieves a maximum frame rate of 35.7 kframe/s, a timing resolution of 0.5 ns, and a timing range of$2\mu $s. The typical average power consumption of the ROIC is 135.5 mW (@21.7 kframes/s). The measured differential nonlinearity (DNL) ranges from -0.74 to +0.82 least significant bit (LSB), and the integral nonlinearity (INL) ranges from -0.95 to +0.95 LSB. Chenggong Wan, Lixia Zheng, Jin Wu 0004, Weifeng Sun 0001 |
IEEE Trans. Circuits Syst. I Regul. Pap. | 6 |
| 2025 | A 870 ppm/V 53 ppm/ ° C 7 MHz Non-Trimmed RC Relaxation Oscillator Using Mixed-Signal Compensation Loop From - 40 ∘C to 165 ∘CabstractIn this paper, an RC relaxation oscillator exhibiting robust performance over an extended temperature and supply range is proposed. By incorporating a digitally-assisted calibration loop, the design eliminates the errors from switch on-resistance, comparator offset and propagation delay. Fabricated using a 180 nm bipolar-CMOS-DMOS (BCD) process technology, the oscillator operates at a frequency of 7MHz with the supply sensitivity of 870 ppm/V across a voltage range of 1.7 to 4.2 V. The evaluation of 40 untrimmed samples achieved an average temperature coefficient (TC) of 52 ppm/$^{\circ}$C from$-$40$^{\circ}$C to 165$^{\circ}$C, with the worst observed TC being 81 ppm/$^{\circ}$C. The aging test results indicate small deviations of 0.3% and 11% in the oscillation frequency and its TC, respectively. Furthermore, the direct power injection test confirms its reliability and robustness with a maximum error of oscillation frequency of 6.4%. Jianlin Xia, Yongjia Li, Weiyue Qu, Zhongyuan Fang, Jin Wu 0004, Feng Lin 0001, Encheng Zhu, Weifeng Sun 0001 |
IEEE Trans. Circuits Syst. I Regul. Pap. | 5 |
| 2024 | A Non-trimmed, 7 MHz and 52 ppm/°C Relaxation Oscillator with Loop Errors Compensation from -40°C to 165°CabstractThis paper presents a RC relaxation oscillator with wide temperature range for automotive application. By using a digitally assisted calibration loop, the comparator offset and the loop delay are efficiently cancelled. With both reference voltage and current derived from the same ΔVBE-based bias circuit, the proposed design cancels leakage currents and makes the design insensitive to high-temperature. The oscillator was fabricated in a 180 nm BCD process, the oscillator operates at 7MHz and achieves a supply sensitivity of 870 ppm/V from 1.7 to 4.2 V at room temperature. Measurements on 40 samples without trimming show that it has an average temperature coefficient of 52 ppm/°C over a wide temperature range (-40°C to 165°C), with the worst case temperature coefficient of 65 ppm/°C. Jianlin Xia, Yongjia Li, Zhongyuan Fang, Jin Wu 0004, Feng Lin 0001, Weifeng Sun 0001 |
ISCAS | 4 |
| 2019 | 64 × 64 GM-APD array-based readout integrated circuit for 3D imaging applications
Jin Wu 0004, Zhiming Qian, Xiangrong Yu, Lixia Zheng, Weifeng Sun 0001 |
Sci. China Inf. Sci. | 1 |