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Omar S. Elkeelany

dblp:18/279 · also Omar Sayed Ahmed Elkeelany · DBLP profile ↗
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11ranked-venue papers
5as first author
0since 2021 · last 2017
0000-0002-6366-4352ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 3 first-authorComputer networks · 2 · 2 first-authorApplied, interdisciplinary, general and emerging computing · 2Artificial intelligence and machine learning · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Reconfigurable computing and FPGAs · 44% Embedded and real-time systems · 44% Integrated circuit design · 13%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Embedded and real-time systems › sensor systems
data acquisition system
0.112009
Simultaneous multi-channel data acquisition with variable sampling frequencies using a scalable adaptive synchronous controller · FPGA 2009
Reconfigurable computing and FPGAs › FPGA-based embedded system
FPGA-based data acquisition
0.112009
Simultaneous multi-channel data acquisition with variable sampling frequencies using a scalable adaptive synchronous controller · FPGA 2009

Methods — techniques the papers use, named apart from their topics

hardware description language · 0.1analog multiplexing · 0.1
YearPublicationVenuePosition
2017 Self-triggering hardware trojan: Due to NBTI related aging in 3-D ICs
Siraj Fulum Mossa, Syed Rafay Hasan, Omar S. Elkeelany
Integr.3
2017 Hardware trojans in 3-D ICs due to NBTI effects and countermeasure
Siraj Fulum Mossa, Syed Rafay Hasan, Omar S. Elkeelany
Integr.3
2009 Multi-channel Multiplexed Stand-alone Audio Data Acquisition System: The effect of settling time on acquisition accuracy
Mohammed A. S. Abdallah, Omar S. Elkeelany
CAINE2
2009 FPGA-Based MPEG-4 Video Encoder SOPC Design with Performance Acceleration of Motion Estimation Block
Seemantini Majgaonkar, Omar S. Elkeelany
CAINE2
2009 Reconfigurable wireless stand-alone platform for Electrical Capacitance Tomography
abstract
This paper presents the assessment of using field programmable gate arrays (FPGA) technology to design a stand-alone electrical capacitance tomography (ECT) system. ECT application is manifested by computationally intensive image reconstruction algorithms requiring fast processing of large amounts of data. To date, reconfigurable hardware has not been used in the area of electrical tomography. Furthermore, the experimental results show that using the FPGA as a hardware platform to realize ECT system achieves superior performance in terms of speed and design compactness compared to DSP implementation.
Wael A. Deabes, Mohammed A. S. Abdallah, Omar S. Elkeelany, Mohamed A. Abdelrahman
CICA3
2009 Simultaneous multi-channel data acquisition with variable sampling frequencies using a scalable adaptive synchronous controller
abstract
In this paper, a novel simultaneous multi-channel data acquisition system is proposed. Analog signals with different bandwidths are applied to an analog multiplexer with a single analog to digital converter. A novel scalable adaptive controller is designed to detect different bandwidths in order to determine the proper sampling rate for each input signal. The analog multiplexer is adaptively controlled to switch between the analog signals of variable bandwidths. The target technology of implementing the proposed design is the Field Programmable Gate Array (FPGA). The Analog-to-Digital Converter interface and the adaptive controller are implemented in the FPGA using hardware description language. The synthesized prototype used only 11% of the total logic elements (of Altera Cyclone II, EP2C35F672C-6N FPGA) and 15% of its total memory bits. The worst-case prorogation delay observed for the system is 12.04 ns, which is less than the 50 MHz clock period of 20ns. The Cyclone-II FPGA consumes power as low as 12 mW. The proposed system can be used in various applications that require heterogeneous multi-channel data acquisition system such as biomedical engineering.
Mohammed A. S. Abdallah, Omar S. Elkeelany, Ali T. Alouani
FPGA2
2009 On chip novel video streaming system for bi-network multicasting protocols
Omar S. Elkeelany
Integr.1
2007 Integrating firewire peripheral interface with an ethernet custom network processor
Omar S. Elkeelany, Ghulam M. Chaudhry
Integr.1
2004 Direct connect device core: design and applications
Omar S. Elkeelany, Ghulam M. Chaudhry
Integr.1
2004 Remote access virtual private network architecture for high-speed wireless internet users
abstract
Abstract The new emerging broadband wireless network (BWN) technologies with high‐speed wireless internet access promotes corporations to provide their roaming employees with high‐speed wireless access to the computing resources on their corporate networks. Thus, a value added service to broadband wireless network is the remote access virtual private network (VPN), where the corporate legitimate users can connect to their offices wirelessly from different locations and get secure services as if they were connected to the corporate local area network (LAN). One of the most important challenges is to block out illegitimate user requests, which are wirelessly received, to protect corporate privacy. Registration (adding new users) and authentication (accepting current users) functions should be implemented with highly secured wireless connection. These functions are accomplished by encapsulating (i.e. tunneling) the user information in a secured form to the corporate authentication server through the internet traffic. The corporate authentication server then grants or denies the user access. In this paper, we propose a new operational design algorithm for remote access wireless VPN authentication and registration protocols that depends on modifying tunnel establishment as compared to existing dial‐in VPN mechanisms. The modifications proposed in this paper are made to support successful deployment of the remote access VPN services over high‐speed wireless network. The paper presents an overview of two tunneling approaches using Layer 3 and Layer 2 separately for implementing these functions. Then we propose how we establish the tunnel in both approaches, and compare it to similar operation steps previously reported for the dial‐in VPN protocols. The proposed algorithms are distinguished from previously developed dial‐in VPN protocols by using L2TP and IPSEC instead of mobile IP. It is also shown that the steps involved in the establishment of the tunnel are functionally different and more appropriate to our applications using communication environment of the BWN. Finally, a qualitative analysis of the added functions, and a comparison between L2TP‐based and IPSec‐based approaches are established. Copyright © 2004 John Wiley & Sons, Ltd.
Omar S. Elkeelany, Mustafa M. Matalgah, Jihad Qaddour
Wirel. Commun. Mob. Comput.1
2002 Performance analysis of IPSec protocol: encryption and authentication
abstract
IPSec provides two types of security algorithms, symmetric encryption algorithms (e.g. data encryption standard DES) for encryption, and one-way hash functions (e.g., message digest MD5 and secured hash algorithm SHA1) for authentication. This paper presents performance analysis and comparisons between these algorithms in terms of time complexity and space complexity. Parameters considered are processing power and input size. The analysis results revealed that HMAC-MD5 can be sufficient for the authentication purposes rather than using the more complicated HMAC-SHA1 algorithm. In encryption applications, authentication should be combined with DES.
Omar S. Elkeelany, Mustafa M. Matalgah, Khurram Sheikh, M. Thaker, Ghulam M. Chaudhry, Deep Medhi, Jihad Qaddour
ICC1