Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.

Vida Kianzad

dblp:18/5098 · DBLP profile ↗
← Back
4ranked-venue papers
4as first author
0since 2021 · last 2006
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 4 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 44% Parallel and multicore computing · 44% Processor architecture and microarchitecture · 13%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Embedded and real-time systems › real-time scheduling
multiprocessor scheduling
0.112006
Efficient Techniques for Clustering and Scheduling onto Embedded Multiprocessors · IEEE Trans. Parallel Distributed Syst. 2006
Parallel and multicore computing
scheduling algorithms
0.112006
Efficient Techniques for Clustering and Scheduling onto Embedded Multiprocessors · IEEE Trans. Parallel Distributed Syst. 2006
Processor architecture and microarchitecture › multiprocessor architecture
interprocessor communication reduction
0.012006
Efficient Techniques for Clustering and Scheduling onto Embedded Multiprocessors · IEEE Trans. Parallel Distributed Syst. 2006

Methods — techniques the papers use, named apart from their topics

benchmark evaluation · 0.1
YearPublicationVenuePosition
2006 Efficient Techniques for Clustering and Scheduling onto Embedded Multiprocessors
abstract
Multiprocessor mapping and scheduling algorithms have been extensively studied over the past few decades and have been tackled from different perspectives. In the late 1980's, the two-step decomposition of schedulingnto clustering and cluster-scheduling - was introduced. Ever since, several clustering and merging algorithms have been proposed and individually reported to be efficient. However, it is not clear how effective they are and how well they compare against single-step scheduling algorithms or other multistep algorithms. In this paper, we explore the effectiveness of the two-phase decomposition of scheduling and describe efficient and novel techniques that aggressively streamline interprocessor communications and can be tuned to exploit the significantly longer compilation time that is available to embedded system designers. We evaluate a number of leading clustering and merging algorithms using a set of benchmarks with diverse structures. We present an experimental setup for comparing the single-step against the two-step scheduling approach. We determine the importance of different steps in scheduling and the effect of different steps on overall schedule performance and show that the decomposition of the scheduling process indeed improves the overall performance. We also show that the quality of the solutions depends on the quality of the clusters generated in the clustering step. Based on the results, we also discuss why the parallel time metric in the clustering step may not provide an accurate measure for the final performance of cluster-scheduling
Vida Kianzad, Shuvra S. Bhattacharyya
IEEE Trans. Parallel Distributed Syst.1
2005 CASPER: An Integrated Energy-Driven Approach for Task Graph Scheduling on Distributed Embedded Systems
abstract
For multiprocessor embedded systems, the dynamic voltage scaling (DVS) technique can be applied to scheduled applications for energy reduction. DVS utilizes slack in the schedule to slow down processes and save energy. Therefore, it is generally believed that the maximal energy saving is achieved on a schedule with the minimum makespan (maximal slack). Most current approaches treat task assignment, scheduling, and DVS separately. In this paper, we present a framework called CASPER (combined assignment, scheduling, and power-management) that challenges this common belief by integrating task scheduling and DVS under a single iterative optimization loop via genetic algorithm. We have conducted extensive experiments to validate the energy efficiency of CASPER. For homogeneous multiprocessor systems (in which all processors are of the same type), we consider a recently proposed slack distribution algorithm (PDP-SPM) by S. Hua and G. Qu (2005): applying PDP-SPM on the schedule with the minimal makespan gives an average of 53.8% energy saving; CASPER finds schedules with slightly larger makespan but a 57.3% energy saving, a 7.8% improvement. For heterogeneous systems, we consider the power variation DVS (PV-DVS) algorithm by Schmitz et al. (2004), CASPER improves its energy efficiency by 8.2%. Finally, our results also show that the proposed single loop CASPER framework saves 23.3% more energy over GMA+EE-GLSA by Schmitz et al. (2002), the only other known integrated approach with a nested loop that combines scheduling and power management in the inner loop but leaves assignment in the outer loop.
Vida Kianzad, Shuvra S. Bhattacharyya, Gang Qu 0001
ASAP1
2004 CHARMED: A Multi-Objective Co-Synthesis Framework for Multi-Mode Embedded Systems
Vida Kianzad, Shuvra S. Bhattacharyya
ASAP1
2001 Multiprocessor Clustering for Embedded Systems
Vida Kianzad, Shuvra S. Bhattacharyya
Euro-Par1