A few years ago, the COVID-19 pandemic significantly altered how post-secondary students receive their education. The transition from an in-person to an online class format changed how students interact with their instructors and classmates. In this study, we used student participation scores from two core computer science classes across ten in-person and three online quarters at a public research university to analyze whether the shift to primarily asynchronous online learning impacted the gender gap in student participation scores and students' attitudes towards themselves and their peers. We observed a shift on the online class forum: in in-person classes, males scored higher on average and dominated the top scores, while in online classes, male and female students participated at approximately the same rate classwide. To understand what drove these changes in participation behavior, we analyzed survey responses from over a quarter of the students enrolled in the online classes. While we found that students of both genders tended to compare themselves to their peers less when classes were online, we also found that this trend was much more accentuated for females than males. This data suggests that observed female participation habits in typical in-person classes are not inherent gender differences, but rather, a product of the environment. Therefore, it is critical that the community continues investigating the root causes of these behavioral differences, and experiments with ways to mitigate them in in-person formats.

Transfer students have to adapt to a new campus environment concurrently with transitioning into upper-division coursework, while native students face this academic leap after two years at the same institution. This may lead to gaps in confidence and academic performance between transfer students and their native peers.

Analogies and metaphors are ubiquitous in computing education, helping instructors break down complex or abstract ideas by connecting them to familiar experiences. This Birds of a Feather session invites educators from across the CS curriculum—from introductory through advanced courses—to share ''sticky'' analogies: explanations that clarify challenging concepts and remain memorable for students. Facilitators will begin with a small set of example analogies that illustrate how to articulate a learning goal, map each component of the analogy to the target concept, and identify any needed cultural or background knowledge. The floor will then open for attendees to contribute analogies that have either worked well for them or fallen flat, enabling collective reflection on what makes an analogy effective or ineffective. A shared document will be collaboratively built during the session so attendees can take away new analogies, refine existing ones, and continue contributing after the symposium.

This paper introduces VRV, a new and open-source RISC-V simulator designed for educational purposes. VRV aims to fill the gap left by the obsolescence of SPIM, the once-popular MIPS simulator, by providing a user-friendly, versatile tool for teaching computer organization and assembly language programming at undergraduate level. VRV offers both command-line and graphical interfaces, implements a large subset of the RISC-V instruction set, and includes features such as an integrated debugger and support for system-level programming. We discuss the design choices, implementation details, and initial classroom experiences with VRV, highlighting its potential to become a valuable resource in computer architecture education. The source code can be found at https://gitlab.com/luplab/vrv.

This paper presents Snapgram, an innovative assignment for teaching matrix multiplications in the context of a Parallel Computing course. Designed for fourth-year undergraduate at the University of California, Davis, this assignment transforms the typically mundane task of matrix multiplication into an engaging exercise by framing it as a simple recommender system for a fictional social media application. Students implement two key operations: multiplying a matrix by itself and selecting the highest values in each row of the resulting matrix. These operations are adaptable to various parallel programming paradigms, including shared-memory (pthreads, OpenMP), distributed-memory (MPI), and GPU programming (CUDA). By contextualizing matrix multiplications within a practical, relatable scenario, Snapgram significantly enhances student engagement and learning outcomes. Instructors are typically encouraged to provide scaffolding code for I/O operations, allowing students to focus on implementing the core algorithms.

Conference presentations usually focus on successful innovations: new ideas that yield significant improvements to current practice. Yet we often learn more from failure than from success. In this panel, we present five case studies of "good ideas" for improving CS education that didn't go as planned, related to offering additional help to students. Each contributor will describe their "good idea," the situation that resulted, and wider lessons for the CS community.

Group work is an excellent way to provide students with more complex, engaging class projects and help them practice many of the professional skills necessary for industry, where large-scale projects have long been the norm. However, as instructors of large CS classes are typically unable to determine individual contributions based on project submissions alone, group work can often cause some frustration when partners of the same group don't put in the same amount of effort yet receive the same score.

rvcodec.js is an open-source, online RISC-V instruction encoder-decoder, specifically geared towards students learning about instruction formats. For improved usability, rvcodec.js uses bright colors to visually map the relationships between the instruction's assembly tokens and binary fields. Students can, for example, quickly identify which bits in the binary representation correspond to a certain immediate value in the assembly instruction. rvcodec.js is available at https://luplab.gitlab.io/rvcodecjs/.

One notable part of the academia-industry gap is the deficiency in computing ecosystem literacy, which may result in college graduates exhibiting little technical knowledge of software development tools and practices commonly used in industry. This paper presents our experience developing and teaching "The Missing CS Class," the student-led 1-unit course that we created at our university to address computing ecosystem literacy. This course primarily targets lower-division students and, based on our observations as peer tutors, covers four common but crucial gaps in technical knowledge: (1) Unix-like command-line environments and tools, (2) Software testing and debugging, (3) Scripting, and (4) Version control. Based on the collected feedback from two consecutive offerings of this course during the winter and spring quarters of 2021, most surveyed students reported having increased their self-efficacy on all course topics and incorporated them into their software development workflow.

Randomly assigning seating is an effective way to prevent exam cheating. Our software tool, LupSeat, is a seating chart generator which is packed with features and can handle large classrooms. Based on a simple, textual representation of the classroom and a CSV-formatted student roster, the tool algorithmically ensures that students are assigned to random seats and get evenly spaced out. It can also account for other factors in the seating assignment, such as accommodating accessible seating needs or hand dominance, and it offers highly customizable, graphical output charts. LupSeat provides both command line and graphical user interfaces for all major platforms and is available at https://gitlab.com/luplab/lupseat.

In terms of students enrolled, post-secondary computer science classes are typically male dominated, which can create a baseline perception of male dominance in class participation. This paper presents our analysis of participation scores received by male and female students in two core computer science classes across ten quarters at the University of California, Davis. We use this data to explore the question: Is there a difference in male and female participation scores, and does this disproportionately impact male and female students' final grades? We find a small gender gap in overall participation scores, but no significant difference between the rate at which male and female students' grades benefit from participation points. However, we do see a difference in behavior when it comes to different formats of participation: males score higher on average in more public formats, such as lecture and forum, while females score higher in more anonymous formats, such as survey completion. Therefore, instructors should diversify their definitions of participation to accommodate for gender correlated preferences in participation formats. Furthermore, we find that the top scorers in the most public forms of participation are disproportionately male. This explains the perception of a larger gender gap in participation than actually exists, which can enforce the stereotype that males have a greater aptitude for CS than females. Finally, although our data show differences in participation behaviors between genders, future research should be conducted to investigate what is driving these differences.

For many embedded systems, data protection is becoming a major issue. On those systems, processors are often heterogeneous and prevent from deploying a common, trusted hypervisor on all of them. Multiple native software stacks are thus bound to share the resources without protection between them. NoC-MPU is a Memory Protection Unit allowing to support the secure and flexible co-hosting of multiple native software stacks running in multiple protection domains, on any shared memory MP-SoC using a NoC. This paper presents a complete hardware architecture of this NoC-MPU mechanism, along with a software trusted model organization.

The effective use of Run Time Reconfiguration (RTR) in modern FPGAs opens up new avenues to design area and power efficient high performance architectures. However the current design flow for exploiting RTR in designs, leads to the problem of silicon Defragmentation. We propose a silicon compaction/ defragmentation technique which works on already placed and routed modules to generate partial bitstreams (programming files) for the device. We have outlined a method which generates these partial bitstreams very fast taking into account the size and position of the "free" silicon when the device is in operation. The other advantage of this method is that the changes in the basic FPGA fabric needed to implement this defragmentation strategy are (almost) trivial.