This paper addresses the problem of unsupervised soft BER estimation for digital communications systems, where no prior knowledge about transmitted information bits is available. We show that the problem of BER estimation is equivalent to estimating the conditional probability density functions (pdf)s of soft channel/receiver outputs. We also propose a non parametric Gaussian Kernel-based pdf estimation technique. Then, we introduce an iterative stochastic expectation maximization (EM) algorithm for the estimation of both a priori and a posteriori probabilities of transmitted information bits, and the classification of soft observations according to transmitted bit values. These inputs serve in the iterative procedure used for the estimation of conditional pdfs. We analyze the performance of the proposed BER estimator and show that is asymptotically unbiased and point-wise consistent. We also provide numerical results in the case of CDMA systems and show that attractive performance is achieved compared with conventional Monte Carlo (MC)-aided techniques.

Wireless communications systems are developing from the 3G toward the beyond 3G or 4G systems aiming to support high data rate services with higher spectrum efficiency than previous systems over broadband channels with acceptable quality of service (QoS). A lot of technical innovations are initiated to satisfy the challenging requirements from the physical layer to the network layer. In this context, Asia-Pacific countries are playing significant roles in promoting the reality of the future B3G wireless mobile communications by lots of research and development (R&D) activities. Extensive mobile and wireless systems research activities are ongoing in China, Japan, and Korea and other countries in this area. This special issue aims to present the recent developments in the emerging wireless communications networks and technology, with an emphasis on research, development, deployment, application, and market issues toward B3G or 4G systems, in the Asia-Pacific countries. The high quality papers from the academia and the industry are gathered. Some advanced 4G system concepts appear in this special issue. For example, in ‘Network and Access Technologies for New Generation Mobile Communications—Overview of National R&D Project in NICT’, the seamless and secure integration of various heterogeneous wireless networks, such as 3G and B3G cellular networks, the IEEE 802.11-compliant high speed wireless access systems, advanced home networks, ITS networks, and digital broadcasting networks is introduced based on a national R&D project carried out in NICT. And in ‘3G Evolution Scenario toward 4G—Super 3G concept’ by NTT DoCoMo, the super 3G concept is introduced for the long-term evolution of 3G mobile communications systems. Some fundamental research works on the different layers of future wireless systems are also included. For example, in ‘Maximum Utility Principle Access Control for B3G Mobile System’ from BUPT, the Maximum Utility Principle Access Control for multi-antenna cellular network architectures is proposed. And in ‘Design of Spreading Codes with High Diversity Gain for Multicarrier CDMA Systems’, a criterion for evaluating the spreading codes of the MC-CDMA systems is proposed and a new full-diversity code constructed by offsetting the phase of the conventional orthogonal codes is introduced. The guest editors hope the collected papers in this special issue will partially reflect the R&D activities and technology innovations in the Asia-Pacific area.

This paper describes an implementation of a new 16 kbps speech codec using commercially available DSPs and its performance. The coding algorithm chosen here is ADPCM with Multi-Quantizer (ADPCM-MQ) which selects the optimum ADPCM coder frame by frame and switches to it dynamically. To implement this coding algorithm, we used two Fujitsu DSPs (MB8764), 1.5 chips for the encoder and 0.5 chip for the decoder. Reconstructed speech with a 21 dB segmental SNR was obtained. With error correction, this codec provides good speech quality even with a bit-error rate of 10^-2 to 10^-3. To improve the subjective quality of the reconstructed speech, adaptive postfiltering was also applied. Since the processing delay of this codec is less than 10 ms, no echo-canceller is needed. Moreover, 2400 bps voice band data (CCITT Rec.V. 26) could be transmitted with a data error rate from 10^-7 to 5×10^-6, and G.III facsimiles were successfully transmitted using this codec.

This paper describes some results of analysis on an architecture focusing on the pipeline structure of multiplier. Throughput of a 16 bit multiplier with fixed point arithmetic was analyzed for a single cycle structure, a 2-stage pipeline structure and a 3-stage pipeline structure. Total efficiency which includes overheads inherent to a pipeline structure was examined for each structure based on the programs made for practical use such as a 32 kb/s ADPCM codec, echo canceler, 19 section filter banks for voice recognition etc. Each analysis showed that the 2-stage pipeline structure is a suitable choice from the view points of efficiency and simplicity of programming.

This paper describes a newly developed CMOS LSI DSP (FDSP3). It has a powerful multiplier, which operates at a rate of 10 M-operations/s, almost twice as fast as the fastest existing LSI DSP's. Some key techniques to attain these high performance characteristics of the DSP are described. Suitable memory capacities of the RAM and ROM were analyzed as a function of the operational capability of the DSP. These were reflected in the design of the FDSP3. To assist in the development of the program, support tools have been developed. A Pascal based cross compiler and an on-line debugging tool are described in some detail.

A stable, compact, and high-performance regenerative repeater circuitry, suitable for digital transmission systems up to several hundred Mbit/s, has been provided through utilization of new devices, such as 7 GHz beam lead shielded junction transistors, and through a new computer-aided design method, and has been successfully applied to the 400 Mbit/s experimental coaxial cable PCM system. Major features of this repeater circuitry are: (1) an equalizing amplifier with low noise figure (7.6 dB), small intersymbol interference (12%), and automatic line equalization of 21 dB tracking range at 200 MHz; (2) a regenerative output circuit with bipolar pulses of 2.4 Vop amplitude and 700 ps rise time; and (3) total performance with sufficient noise margin (10 dB for error rate 10-11over a line of 56 dB loss at 200 MHz), small static pattern jitter (20°pp), smaller size (270 \times 160 \times 52mm), and lower power (5.8 W). These have been achieved by use of: (1) new devices such as beam lead transistors with fTof 7 GHz,Leof 0.2 nH andCobof 0.4 pF and tantalum thin film hybrid integrated circuits; and (2) a new CAD system including block simulation, network design/ simulation, layout design subsystems which use transmission quality (error rate and jitter) as a design criterion, and which can also be directly connected to the manufacture automation systems, e.g., for mask preparation, and transistor mounting by bonding.