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Jin-Hyun Kang

dblp:180/3794 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 2016
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
hardware test
0.212016
Reducing control bit overhead for X-masking/X-canceling hybrid architecture via pattern partitioning · DAC 2016
Electronic design automation › hardware verification and test
test response compaction
0.212016
Reducing control bit overhead for X-masking/X-canceling hybrid architecture via pattern partitioning · DAC 2016
Electronic design automation › hardware verification and test
fault coverage
0.112016
Reducing control bit overhead for X-masking/X-canceling hybrid architecture via pattern partitioning · DAC 2016

Methods — techniques the papers use, named apart from their topics

pattern partitioning · 0.2XOR-based cancellation · 0.2
YearPublicationVenuePosition
2016 Reducing control bit overhead for X-masking/X-canceling hybrid architecture via pattern partitioning
abstract
An X-masking scheme prevents unknown (X) values from shifting into an output response compactor, whereas an X-canceling MISR methodology allows X's to enter the compactor, but then cancels them out through selective XORing. However, both approaches require significantly high volume of the control bits to remove X values to generate X-free output signatures. This paper proposes a method to reduce the control bit overhead by combining X-masking and X-canceling methodologies and exploiting the fact that unknown values tend to have high correlation in the scan cells. In this paper, correlation is considered across whole patterns in order to enhance reuse of control bits. The proposed hybrid method of X-canceling and X-masking reduces test time without losing fault coverage. The experimental results show that the proposed method significantly reduces control bits and test time compared to a conventional X-canceling MISR methodology.
Jin-Hyun Kang, Nur A. Touba, Joon-Sung Yang
DAC1