Demo Data from EDBT 2026 / reviewers in the wild / expert
Alan E. Negrin
dblp:180/6433
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1964
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › logic synthesis
boolean function realization |
0.0 | 1 | 1964 | Synthesis of Practical Three-Input Majority Logic Networks · IEEE Trans. Electron. Comput. 1964 |
Electronic design automation
logic synthesis |
0.0 | 1 | 1964 | Synthesis of Practical Three-Input Majority Logic Networks · IEEE Trans. Electron. Comput. 1964 |
Electronic design automation › logic synthesis › threshold logic synthesis
majority-logic synthesis |
0.0 | 1 | 1964 | Synthesis of Practical Three-Input Majority Logic Networks · IEEE Trans. Electron. Comput. 1964 |
Methods — techniques the papers use, named apart from their topics
digital computer program · 0.0akers theory · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1964 | Synthesis of Practical Three-Input Majority Logic NetworksabstractThis paper deals with a method of realizing switching functions with three-input majority gates, utilizing a modification of the theory of Akers [1]. This approach attempts to minimize the total number of elements used for both gating and delay. The method derived is suitable for implementation on a digital computer and a program was written for the Burroughs 220 computer which produces excellent results for switching functions of 6 variables or less. Results of sample programs are given and limitations of the method are discussed. Alan E. Negrin |
IEEE Trans. Electron. Comput. | 1 |