Operation of fast analog-hybrid computers at kilocycle iteration rates requires wideband amplifiers, low computing impedances, and electronic track-hold and integrator mode-control switching within tens of nanoseconds. This paper describes the design and circuit analysis of a new switched-amplifer mode-control circuit designed for the University of Arizona's ASTRAC II iterative differential analyzer. The bandwidth of the circuit in track is down 3 dB at 2.5 Mc, which accounts for a phase shift of 0.005 radian (< 0.3 deg) at 10 Kc. The circuits switch into COMPUTE (HOLD) in less than 80 ns; two or more integrators switch within 20 ns of each other. Voltage drift in the TRACK or RESET mode is within ±50 μV/°C between -20 to +60°C.