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I. R. Butcher

dblp:180/6461 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1964
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 77% Integrated circuit design · 23%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › non-volatile memory
read-only memory
0.011964
A Prewired Storage Unit · IEEE Trans. Electron. Comput. 1964
Integrated circuit design › digital circuit design › switching circuits
sequential switching circuit
0.011964
A Prewired Storage Unit · IEEE Trans. Electron. Comput. 1964

Methods — techniques the papers use, named apart from their topics

ferrite rod array · 0.0
YearPublicationVenuePosition
1964 A Prewired Storage Unit
abstract
A flexible and economical form of prewired semi-permanent storage with a capacity of 4096 words of 40 bits is described. A cycle time of 1 μsec can be readily achieved. The information is prepared by threading wires onto plates which are then placed over an array of ferrite rods. The sense in which a wire passes around the rod determines whether a current pulse in the wire will induce a positive or negative voltage in an output winding wound around the rod. Eight plates, each with 512 words, can be used. The plates can be removed from the store, allowing the information held in the store to be changed quickly and easily. The application of this form of storage to the design of sequential switching circuits is briefly discussed.
I. R. Butcher
IEEE Trans. Electron. Comput.1