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Parker Hill

dblp:180/8211 · DBLP profile ↗
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4ranked-venue papers
1as first author
0since 2021 · last 2019
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-authorArtificial intelligence and machine learning · 1Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
GPUs and heterogeneous computing · 31% Emerging computing paradigms · 27% Processor architecture and microarchitecture · 27%
Artificial intelligence
2 papers
Question answering and dialogue systems · 90% Deep learning architectures and training · 10%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%

Topics — the 8 heaviest of 9, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Natural language and speech › Question answering and dialogue systems
intent detection
0.412019
An Evaluation Dataset for Intent Classification and Out-of-Scope Prediction · EMNLP/IJCNLP (1) 2019
GPUs and heterogeneous computing
deep learning on GPUs
0.312017
DeftNN: addressing bottlenecks for DNN execution on GPUs via synapse vector elimination and near-compute data fission · MICRO 2017
Compilers and program optimization
approximate computing
0.212016
Input responsiveness: using canary inputs to dynamically steer approximation · PLDI 2016
Emerging computing paradigms
approximate computing
0.212016
Concise loads and stores: The case for an asymmetric compute-memory architecture for approximation · MICRO 2016
Processor architecture and microarchitecture
instruction set architecture
0.212016
Concise loads and stores: The case for an asymmetric compute-memory architecture for approximation · MICRO 2016
Machine learning › Deep learning architectures and training › neural network inference
DNN inference
0.112017
DeftNN: addressing bottlenecks for DNN execution on GPUs via synapse vector elimination and near-compute data fission · MICRO 2017
Memory systems
cache
0.112016
Concise loads and stores: The case for an asymmetric compute-memory architecture for approximation · MICRO 2016
Memory systems › memory bandwidth management
memory bandwidth reduction
0.112016
Concise loads and stores: The case for an asymmetric compute-memory architecture for approximation · MICRO 2016

Methods — techniques the papers use, named apart from their topics

synapse vector elimination · 0.6data fission · 0.6simulation · 0.2functional unit design · 0.2dynamic approximation steering · 0.2canary input · 0.2
YearPublicationVenuePosition
2019 An Evaluation Dataset for Intent Classification and Out-of-Scope Prediction
abstract
Stefan Larson, Anish Mahendran, Joseph J. Peper, Christopher Clarke, Andrew Lee, Parker Hill, Jonathan K. Kummerfeld, Kevin Leach, Michael A. Laurenzano, Lingjia Tang, Jason Mars. Proceedings of the 2019 Conference on Empirical Methods in Natural Language Processing and the 9th International Joint Conference on Natural Language Processing (EMNLP-IJCNLP). 2019.
Stefan Larson, Anish Mahendran, Joseph Peper, Christopher Clarke, Andrew Lee 0001, Parker Hill, Jonathan K. Kummerfeld, Kevin Leach, Michael Laurenzano, Lingjia Tang, Jason Mars
EMNLP/IJCNLP (1)6
2017 DeftNN: addressing bottlenecks for DNN execution on GPUs via synapse vector elimination and near-compute data fission
abstract
Deep neural networks (DNNs) are key computational building blocks for emerging classes of web services that interact in real time with users via voice, images and video inputs. Although GPUs have gained popularity as a key accelerator platform for deep learning workloads, the increasing demand for DNN computation leaves a significant gap between the compute capabilities of GPU-enabled datacenters and the compute needed to service demand.
Parker Hill, Animesh Jain, Mason Hill, Babak Zamirai, Chang-Hong Hsu, Michael Laurenzano, Scott A. Mahlke, Lingjia Tang, Jason Mars
MICRO1
2016 Concise loads and stores: The case for an asymmetric compute-memory architecture for approximation
abstract
Cache capacity and memory bandwidth play critical roles in application performance, particularly for data-intensive applications from domains that include machine learning, numerical analysis, and data mining. Many of these applications are also tolerant to imprecise inputs and have loose constraints on the quality of output, making them ideal candidates for approximate computing. This paper introduces a novel approximate computing technique that decouples the format of data in the memory hierarchy from the format of data in the compute subsystem to significantly reduce the cost of storing and moving bits throughout the memory hierarchy and improve application performance. This asymmetric compute-memory extension to conventional architectures, ACME, adds two new instruction classes to the ISA - load-concise and store-concise - along with three small functional units to the micro-architecture to support these instructions. ACME does not affect exact execution of applications and comes into play only when concise memory operations are used. Through detailed experimentation we find that ACME is very effective at trading result accuracy for improved application performance. Our results show that ACME achieves a 1.3x speedup (up to 1.8x) while maintaining 99% accuracy, or a 1.1x speedup while maintaining 99.999% accuracy. Moreover, our approach incurs negligible area and power overheads, adding just 0.005% area and 0.1% power to a conventional modern architecture.
Animesh Jain, Parker Hill, Shih-Chieh Lin, Muneeb Khan, Md. Enamul Haque, Michael Laurenzano, Scott A. Mahlke, Lingjia Tang, Jason Mars
MICRO2
2016 Input responsiveness: using canary inputs to dynamically steer approximation
abstract
This paper introduces Input Responsive Approximation (IRA), an approach that uses a canary input — a small program input carefully constructed to capture the intrinsic properties of the original input — to automatically control how program approximation is applied on an input-by-input basis. Motivating this approach is the observation that many of the prior techniques focusing on choosing how to approximate arrive at conservative decisions by discounting substantial differences between inputs when applying approximation. The main challenges in overcoming this limitation lie in making the choice of how to approximate both effectively (e.g., the fastest approximation that meets a particular accuracy target) and rapidly for every input. With IRA, each time the approximate program is run, a canary input is constructed and used dynamically to quickly test a spectrum of approximation alternatives. Based on these runtime tests, the approximation that best fits the desired accuracy constraints is selected and applied to the full input to produce an approximate result. We use IRA to select and parameterize mixes of four approximation techniques from the literature for a range of 13 image processing, machine learning, and data mining applications. Our results demonstrate that IRA significantly outperforms prior approaches, delivering an average of 10.2× speedup over exact execution while minimizing accuracy losses in program outputs.
Michael Laurenzano, Parker Hill, Mehrzad Samadi, Scott A. Mahlke, Jason Mars, Lingjia Tang
PLDI2