Lizheng Liu

dblp:181/0906 · DBLP profile ↗
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10ranked-venue papers
4as first author
6since 2021 · last 2025
0000-0002-6554-2041ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 1 first-author · 3 since 2021Computer networks · 2 · 1 first-author · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
YearPublicationVenuePosition
2025 Towards Advanced Emotional Care: Embodied Emotional Care System for Humanoid Robots
abstract
In modern healthcare, emotional well-being is critical to patient recovery and overall outcomes. However, limited availability of trained professionals and time constraints often hinder the delivery of consistent emotional support. To address this gap, we propose the Embodied Emotional Care System (EECS), a comprehensive humanoid robotic framework designed to deliver personalized emotional care through an integrated, multi-layered architecture. EECS analyzes dynamic facial expressions and real-time vocal inputs to extract the patient’s emotional state and semantic information, constructs context-aware prompts processed by an LLM for reasoning, and ultimately generates empathetic dialogues synchronized with human-like facial expressions and natural body movements to address diverse emotional support needs. Experimental results show that deploying EECS on a humanoid robot significantly boosts patient engagement through real-time multimodal interaction, delivering deeper emotional support and a more human-like therapeutic experience. Furthermore, it bridges gaps in professional emotional support resources, offering a feasible pathway to improve overall healthcare quality.
Yang Chang, Aoxing Li, Yuxuan Lin 0001, Lizheng Liu, Yang Liu 0246, Jing Liu 0050, Yan Wang 0068, Zhongxue Gan 0001
ICME5
2025 Vision-Based Leader-Follower Formation Control with Distance-Angle Feedback Regulation
abstract
This paper presents a resource-efficient monocular vision framework for leader-follower formation control in GPS-denied environments. To address the challenges of markerless navigation and dynamic interference, our approach integrates geometry-constrained perception with a dual-loop PID control architecture. The main contributions are: (1) A dynamic inverse projection method that reduces scale drift by 62% through optical flow-verified bounding box normalization; (2) A cascaded PID architecture that decouples distance and angle control, achieving 15 FPS on embedded hardware; (3) An implicit communication paradigm enabling 92% occlusion recovery without explicit data exchange. Experimental results demonstrate a 5.2% mean distance error in the 10-25cm range, sub-centimeter adjustments under varying illumination, and robustness in textured environments. Comparative analysis shows a 31% reduction in tracking error compared to marker-based baselines. These findings highlight the potential of our framework for robust, scalable, and infrastructure-free multi-robot formation control.
Sunyao Zhou, Zhuo Zou, Yonghao Li, Muzhen He, Lizheng Liu
INDIN6
2024 Robust Robot Formation Control Based on Streaming Communication and Leader-Follower Approach
abstract
In this paper, a non-visual robotic formation control method based on a streaming communication architecture and a leader-follower control model is studied. The proposed stream-based communication architecture is inspired by the flocking behavior of fish. We analogize it into a form resembling an N-ary tree for communication purposes. Communication proceeds to the next layer only when all nodes in the upper layer have completed the follower selection. We also introduce a fault-tolerance mechanism and a termination filtering mechanism to prevent multiple leaders from choosing the same follower, avoiding a scenario where the robots in the last layer enter an endless loop of follower selection. The proposed stream-based communication architecture, built upon serial and parallel tracking, can achieve more complex formations, such as rectangular formations, closely resembling real-world scenarios, significantly enhancing formation efficiency. Simulation experiments on the e-puck platform validate the effectiveness and robustness of this architecture.
Zhuo Zou, Xiaoming Hu 0001, Zhongxue Gan 0001, Lizheng Liu
IWCMC5
2024 Large-Scale Mean-Field Federated Learning for Detection and Defense: A Byzantine Robustness Approach in IoT
abstract
Federated learning (FL) protects data privacy by sharing gradients across clients rather than local training data. However, malicious clients (e.g., attackers and stragglers) hiding in large-scale FL will severely reduce the learning performance. Thus, how to efficiently detect and defend Byzantine attacks in large-scale FL remains an urgent issue. This article proposes a reputation-aware mean-field-game-based FL (FedMFG) framework, which aims to defend against Byzantine attacks and improve learning performance. Precisely, we first model the process of large-scale FL as a mean-field game problem across clients and prove the existence and uniqueness of mean-field FL gradients (i.e., Nash equilibrium). We then design a mean-field FL gradient calculation algorithm based on stochastic differential equations, i.e., Hamilton-Jacobi–Bellman and Fokker-Planck–Kolmogorov equations. Based on comparing the cosine similarity of obtained mean-field and individual FL gradients, we build reputation-aware malicious client detection and defense mechanism, which improves the Byzantine robustness of FL with the global learning performance guarantee. Finally, experimental results show that our proposed framework outperforms the baseline algorithms in realizing Byzantine robustness and improving learning performance. Specifically, our algorithm improves the model accuracy by 10% and 72.7% for the no-attacker and attacker scenarios, respectively.
Lizheng Liu, Jianhua Li 0001, Jun Wu 0001
IEEE Internet Things J.2
2022 A Hybrid-Mode On-Chip Router for the Large-Scale FPGA-Based Neuromorphic Platform
abstract
Large-scale neuromorphic computing requires the multi-chip network to provide high computing power. Efficient routing schemes and on-chip router design are necessary for handling various inter-chip transmission patterns. In this paper, we propose a hybrid-mode on-chip router that supports both multicast and unicast routing for the large-scale neuromorphic simulation. Two routing schemes, namely Cache-like Spike Weight Indexing and General Unicast Flow Control, are proposed to accommodate the chip-to-chip transmission of spike and non-spike data. This work is evaluated on a neuromorphic platform built with an$8\times 8$FPGA chips array. Running a simulation of 1M neurons at 200MHz, the proposed router achieves a processing latency of 25ns and a chip-to-chip latency of 287ns. Working in the unicast mode, the router can synchronize status flags of all chips within$5 ~\mu \text{s}$. Moreover, it reduces the peak spike traffic by 25.65% with the help of Load-aware Multicast Routing, compared with other multicast routing strategies.
Chen Ding 0010, Yuxiang Huan, Yulong Yan, Fanxi Yang, Lizheng Liu, Meigen Shen, Zhuo Zou, Lirong Zheng 0001
IEEE Trans. Circuits Syst. I Regul. Pap.6
2021 IECA: An In-Execution Configuration CNN Accelerator With 30.55 GOPS/mm² Area Efficiency
abstract
It remains challenging for a Convolutional Neural Network (CNN) accelerator to maintain high hardware utilization and low processing latency with restricted on-chip memory. This paper presents an In-Execution Configuration Accelerator (IECA) that realizes an efficient control scheme, exploring architectural data reuse, unified in-execution controlling, and pipelined latency hiding to minimize configuration overhead out of the computation scope. The proposed IECA achieves row-wise convolution with tiny distributed buffers and reduces the size of total on-chip memory by removing 40% of redundant memory storage with shared delay chains. By exploiting a reconfigurable Sequence Mapping Table (SMT) and Finite State Machine (FSM) control, the chip realizes cycle-accurate Processing Element (PE) control, automatic loop tiling and latency hiding without extra time slots for pre-configuration. Evaluated on AlexNet and VGG-16, the IECA retains over 97.3% PE utilization and over 95.6% memory access time hiding on average. The chip is designed and fabricated in a UMC 55-nm process running at a frequency of 250 MHz and achieves an area efficiency of 30.55 GOPS/mm2and 0.244 GOPS/KGE (kilo-gate-equivalent), which makes an over$2.0\times $and$2.1\times $improvement, respectively, compared with that of previous related works. Implementation of the IEC control scheme uses only a 0.55% area of the 2.75 mm2core.
Boming Huang, Yuxiang Huan, Haoming Chu, Jiawei Xu 0002, Lizheng Liu, Lirong Zheng 0001, Zhuo Zou
IEEE Trans. Circuits Syst. I Regul. Pap.5
2020 An Autonomous Error-Tolerant Architecture Featuring Self-reparation for Convolutional Neural Networks
abstract
Convolutional neural networks are widely used in artificial intelligence and Internet of Things area. As the scale of convolutional neural network expands, more and more processing units are provided for it. The systems are easy prone to error, and any computing problems in any layer of the network will lead to wrong output results. Traditional multimode redundancy methods make the systems more complex, and increase power consumption. This paper proposes an autonomous error-tolerant architecture for convolutional neural networks. Taking the LeNet-5 as an example, the network layers of CNN are mapped on the AET architecture, an error-tolerant synapse is designed to discover the errors, an active evolution scheme is designed to handle unrecoverable errors and implement network reconfiguration. This design is implemented on FPGA, and the experimental results show that this architecture can realize effective error tolerance for convolutional neural network and has fast error recovery ability under the premise of ensuring the same recognition accuracy.
Lizheng Liu, Yuxiang Huan, Zhuo Zou, Xiaoming Hu 0001, Lirong Zheng 0001
VTC Spring1
2020 A Smart Dental Health-IoT Platform Based on Intelligent Hardware, Deep Learning, and Mobile Terminal
abstract
The dental disease is a common disease for a human. Screening and visual diagnosis that are currently performed in clinics possibly cost a lot in various manners. Along with the progress of the Internet of Things (IoT) and artificial intelligence, the internet-based intelligent system have shown great potential in applying home-based healthcare. Therefore, a smart dental health-IoT system based on intelligent hardware, deep learning, and mobile terminal is proposed in this paper, aiming at exploring the feasibility of its application on in-home dental healthcare. Moreover, a smart dental device is designed and developed in this study to perform the image acquisition of teeth. Based on the data set of 12 600 clinical images collected by the proposed device from 10 private dental clinics, an automatic diagnosis model trained by MASK R-CNN is developed for the detection and classification of 7 different dental diseases including decayed tooth, dental plaque, uorosis, and periodontal disease, with the diagnosis accuracy of them reaching up to 90%, along with high sensitivity and high specificity. Following the one-month test in ten clinics, compared with that last month when the platform was not used, the mean diagnosis time reduces by 37.5% for each patient, helping explain the increase in the number of treated patients by 18.4%. Furthermore, application software (APPs) on mobile terminal for client side and for dentist side are implemented to provide service of pre-examination, consultation, appointment, and evaluation.
Lizheng Liu, Jiawei Xu 0002, Yuxiang Huan, Zhuo Zou, Shih-Ching Yeh, Lirong Zheng 0001
IEEE J. Biomed. Health Informatics1
2018 A Design of Autonomous Error-Tolerant Architectures for Massively Parallel Computing
Lizheng Liu, Yi Jin 0007, Yi Liu 0027, Yuxiang Huan, Zhuo Zou, Lirong Zheng 0001
IEEE Trans. Very Large Scale Integr. Syst.1
2016 A preload cooperative sensing scheme with low overhead in cognitive radio networks
abstract
Abstract In cognitive radio networks (CRNs), users can collaborate to improve the accuracy of spectrum sensing, but a large number of secondary users reporting their local sensing results may create significant overhead. In this paper, we propose a new pre‐sensing scheme, called preload cooperative sensing (PCS), which not only attains the given sensing accuracy for CRNs but also reduces the whole sensing timeT. In order to reduce the sensing overhead in CRNs, the proposed scheme adopts two key technologies: selective reporting technology and pre‐sensing sequential detection technology. Selective reporting technology implies that only those users, which detect the presence of primary users, need to report the results, while pre‐sensing sequential detection technology is an asynchronous parallel scheme, which sets a threshold to determine the presence of primary users. Considering the preload sensing slots, we derive a formula to express the overall miss detection probability, and at a given Quality of Service (QoS) value, the sensing overheads of PCS are analyzed over Rayleigh fading channel. Also, we consider the overhead minimization problems in PCS. Simulation results show the superiority and efficiency of the PCS scheme. Copyright © 2015 John Wiley & Sons, Ltd.
Lizheng Liu, Fang'ai Liu, Jian Liu 0026, Zhizhong Zhang 0005
Wirel. Commun. Mob. Comput.1