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Demo Data from EDBT 2026 / reviewers in the wild / expert

R. J. Slobodin

dblp:181/6307 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1962
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 87% Performance modeling and evaluation · 13%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
digital circuit design		 0.011962
On Statistical Analysis of a DTL Gate · IRE Trans. Electron. Comput. 1962
Integrated circuit design › digital logic
logic gate		 0.011962
On Statistical Analysis of a DTL Gate · IRE Trans. Electron. Comput. 1962
Performance modeling and evaluation
statistical analysis		 0.011962
On Statistical Analysis of a DTL Gate · IRE Trans. Electron. Comput. 1962

Methods — techniques the papers use, named apart from their topics

statistical analysis · 0.0
YearPublicationVenuePosition
1962 On Statistical Analysis of a DTL Gate
R. J. Slobodin
 IRE Trans. Electron. Comput.1